© Semiconductor Components Industries, LLC, 2002

January, 2002 – Rev. 7

1

Publication Order Number:

MC10121/D

MC10121

4-Wide OR-AND/OR-AND

Gate

The MC10121 is a basic logic building block providing the

simultaneous OR–AND/OR–AND–Invert function, useful in data

control and digital multiplexing applications.

DIP

PIN ASSIGNMENT

16

15

14

13

12

11

10

9

1

2

3

4

5

6

7

8

Pin assignment is for Dual–in–Line Package.

For PLCC pin assignment, see the Pin Conversion Tables on page 18

of the ON Semiconductor MECL Data Book (DL122/D).

LOGIC DIAGRAM

15

14

13

12

11

10

9

7

2

6

5

4

3

http://onsemi.com

Device

Package

Shipping

ORDERING INFORMATION

MC10121L

CDIP–16

25 Units / Rail

MC10121P

PDIP–16

25 Units / Rail

MC10121FN

PLCC–20

46 Units / Rail

MARKING

DIAGRAMS

1

16

A

= Assembly Location

WL = Wafer Lot

YY = Year

WW = Work Week

CDIP–16

L SUFFIX

CASE 620

MC10121L

AWLYYWW

PDIP–16

P SUFFIX

CASE 648

PLCC–20

FN SUFFIX

CASE 775

10121

AWLYYWW

1

1

16

MC10121P

AWLYYWW