MC74LVX574

http://onsemi.com

2

Figure 2. Logic Diagram

C

D

Q

2

D0

19 Q0

C

D

Q

3

D1

18 Q1

C

D

Q

4

D2

17 Q2

C

D

Q

5

D3

16 Q3

C

D

Q

6

D4

15 Q4

C

D

Q

7

D5

14 Q5

C

D

Q

8

D6

13 Q6

C

D

Q

9

D7

12 Q7

11

CP

1

OE

OE

CP

Q

L

L

L

H

L, H,

X

H

L

No Change

Z

INPUTS

OUTPUT

FUNCTION TABLE

D

H

L

X

X

PIN NAMES

Function

Output Enable Input

Clock Pulse Input

Data Inputs

3−State Latch Outputs

Pins

OE

CP

D0−D7

O0−O7

ORDERING INFORMATION

Device

Package

MC74LVX574DWR2

SOIC−20

1000 Tape & Reel

MC74LVX574DWR2G

SOIC−20

(Pb−Free)

1000 Tape & Reel

MC74LVX574DT

TSSOP−20*

75 Units / Rail

MC74LVX574DTR2

TSSOP−20*

2500 Tape & Reel

MC74LVX574M

SOEIAJ−20

40 Units / Rail

MC74LVX574MG

SOEIAJ−20

(Pb−Free)

40 Units / Rail

MC74LVX574MEL

SOEIAJ−20

2000 Tape & Reel

MC74LVX574MELG

SOEIAJ−20

(Pb−Free)

2000 Tape & Reel

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

*This package is inherently Pb−Free.