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TEA2025D-S20-R Datasheet(PDF) 5 Page - Unisonic Technologies |
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TEA2025D-S20-R Datasheet(HTML) 5 Page - Unisonic Technologies |
5 / 8 page TEA2025D LINEAR INTEGRATED CIRCUIT UNISONICTECHNOLOGIESCO.,LTD 5 of 8 www.unisonic.com.tw QW-R107-017,B ■ APPLICATION INFORMATION Input Capacitor Input capacitor is PNP type allowing source to be referenced to ground. In this way no input coupling capacitor is required. However, a series capacitor(0.22µF) to the input side can be useful in case of noise due to variable resistor contact. Bootstrap The bootstrap connection allows to increase the output swing. The suggested value for the bootstrap capacitors (100µF) avoids a reduction of the output signal also at low frequencies and low supply voltage. Voltage Gain Adjust STEREO MODE The voltage gain is determined by on-chip resistors R1 and R2 together with the external RfC1 series connected between pin 8(13) and ground. The frequency response is given approximated by: VOUT VIN = R1 Rf +R2+ 1 JWC1 With Rf=0,C1=100µF, the gain results 46dB with pole at f=32Hz The purpose of RfI is to reduce the gain. It is recommended to not reduce it under 36dB. BRIDGE MODE Rf C1 R2 50 R1 10K 8(13) 2(19) Figure 7 The bridge configuration is realized very easily thanks to an internal voltage divider which provides (at pin 1)the CH1 output signal after reduction. It is enough to connect pin8(inverting input of CH 2 )with a capacitor to pin 1 and to connect to ground the pin 9. The total gain of the bridge is given by: VOUT VIN = R1 Rf +R2+ 1 JWC1 (1+ R3 R4 R1 R2+R4+ 1 JWC1 ) and with the suggested values (C1=C2=100µF,Rf=0)means: Gv=52dB R1 10K Figure 8 R1 10K R3 5K R4 50 R2 R2 OUT OUT IN With first pole at f=32Hz |
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