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BUK9508-55 Datasheet(PDF) 5 Page - NXP Semiconductors |
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BUK9508-55 Datasheet(HTML) 5 Page - NXP Semiconductors |
5 / 8 page Philips Semiconductors Product specification TrenchMOS ™ transistor BUK9508-55 Logic level FET Fig.11. Sub-threshold drain current. I D = f(VGS); conditions: Tj = 25 ˚C; VDS = VGS Fig.12. Typical capacitances, C iss, Coss, Crss. C = f(V DS); conditions: VGS = 0 V; f = 1 MHz Fig.13. Typical turn-on gate-charge characteristics. V GS = f(QG); conditions: ID = 50 A; parameter VDS Fig.14. Typical reverse diode current. I F = f(VSDS); conditions: VGS = 0 V; parameter Tj Fig.15. Normalised avalanche energy rating. W DSS% = f(Tmb); conditions: ID = 75 A Fig.16. Avalanche energy test circuit. 0 0.5 1 1.5 2 2.5 3 1E-05 1E-05 1E-04 1E-03 1E-02 1E-01 Sub-Threshold Conduction 2% typ 98% 0 0.2 0.4 0.6 0.8 1 1.2 0 20 40 60 80 100 Tj/C = 175 25 IF/A VSDS/V 0.01 0.1 1 10 100 0 2 4 6 8 10 12 VDS/V Ciss Coss Crss 20 40 60 80 100 120 140 160 180 Tmb / C 120 110 100 90 80 70 60 50 40 30 20 10 0 WDSS% 0 1020 304050 6070 8090 0 1 2 3 4 5 6 VGS/V VDS = 14V VDS = 44V QG/nC L T.U.T. VDD RGS R 01 VDS -ID/100 + - shunt VGS 0 W DSS = 0.5 ⋅ LID 2 ⋅ BV DSS/(BVDSS − VDD) February 1997 5 Rev 1.000 |
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