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MC74LCX74 Datasheet(PDF) 1 Page - ON Semiconductor

Part # MC74LCX74
Description  Low-Voltage CMOS Dual D-Type Flip-Flop With 5 V?뭈olerant Inputs
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

MC74LCX74 Datasheet(HTML) 1 Page - ON Semiconductor

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© Semiconductor Components Industries, LLC, 2005
May, 2005 − Rev. 5
1
Publication Order Number:
MC74LCX74/D
MC74LCX74
Low−Voltage CMOS Dual
D−Type Flip−Flop
With 5 V−Tolerant Inputs
The MC74LCX74 is a high performance, dual D−type flip−flop
with asynchronous clear and set inputs and complementary (O, O)
outputs. It operates from a 2.3 to 3.6 V supply. High impedance TTL
compatible inputs significantly reduce current loading to input drivers
while TTL compatible outputs offer improved switching noise
performance. A VI specification of 5.5 V allows MC74LCX74 inputs
to be safely driven from 5.0 V devices.
The MC74LCX74 consists of 2 edge−triggered flip−flops with
individual D−type inputs. The flip−flop will store the state of
individual D inputs, that meet the setup and hold time requirements, on
the LOW−to−HIGH Clock (CP) transition.
Features
Designed for 2.3 V to 3.6 V V
CC Operation
5.0 V Tolerant Inputs − Interface Capability With 5.0 V TTL Logic
LVTTL Compatible
LVCMOS Compatible
24 mA Balanced Output Sink and Source Capability
Near Zero Static Supply Current in All Three Logic States (10 mA)
Substantially Reduces System Power Requirements
Latchup Performance Exceeds 500 mA
ESD Performance:
Human Body Model >2000 V
Machine Model >200 V
Pb−Free Packages are Available*
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
MARKING
DIAGRAMS
TSSOP−14
DT SUFFIX
CASE 948G
14
1
SOEIAJ−14
M SUFFIX
CASE 965
SOIC−14
D SUFFIX
CASE 751A
14
1
14
1
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
ORDERING INFORMATION
http://onsemi.com
A
= Assembly Location
L, WL
= Wafer Lot
Y, YY
= Year
W, WW
= Work Week
G
= Pb−Free Package
G
= Pb−Free Package
(Note: Microdot may be in either location)
1
14
74LCX74
ALYWG
LCX74G
AWLYWW
1
14
LCX
74
ALYW
G
G
1
14


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