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MC74HCT138A Datasheet(PDF) 1 Page - ON Semiconductor |
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MC74HCT138A Datasheet(HTML) 1 Page - ON Semiconductor |
1 / 8 page © Semiconductor Components Industries, LLC, 2005 July, 2005 − Rev. 8 1 Publication Order Number: MC74HCT138A/D MC74HCT138A 1−of−8 Decoder/ Demultiplexer with LSTTL Compatible Inputs High−Performance Silicon−Gate CMOS The MC74HCT138A is identical in pinout to the LS138. The HCT138A may be used as a level converter for interfacing TTL or NMOS outputs to High Speed CMOS inputs. The HCT138A decodes a three−bit Address to one−of−eight active−lot outputs. This device features three Chip Select inputs, two active−low and one active−high to facilitate the demultiplexing, cascading, and chip−selecting functions. The demultiplexing function is accomplished by using the Address inputs to select the desired device output; one of the Chip Selects is used as a data input while the other Chip Selects are held in their active states. Features • Output Drive Capability: 10 LSTTL Loads • TTL/NMOS Compatible Input Levels • Outputs Directly Interface to CMOS, NMOS, and TTL • Operating Voltage Range: 4.5 to 5.5 V • Low Input Current: 1.0 mA • In Compliance with the Requirements Defined by JEDEC Standard No. 7A • Chip Complexity: 122 FETs or 30.5 Equivalent Gates • Pb−Free Packages are Available* *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com MARKING DIAGRAMS SOIC−16 D SUFFIX CASE 751B TSSOP−16 DT SUFFIX CASE 948F 1 16 PDIP−16 N SUFFIX CASE 648 1 16 1 16 1 16 MC74HCT138AN AWLYYWWG 1 16 HCT138AG AWLYWW HCT 138 ALYW 1 16 A = Assembly Location WL, L = Wafer Lot Y, YY = Year W, WW = Work Week G = Pb−Free Package See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. ORDERING INFORMATION |
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