PDSP16515A

4

SIGNAL

TYPE

DESCRIPTION

D15:0

I

Data input during real only mode. The real component in complex data mode.

AUX15:0

I

When DEF is active AUX15:0 are used to define the operating mode as defined in Table 3.

When DEF is in-active AUX15:0 either provide the 16 bit imaginary component of complex

input data, or a second set of real only inputs.

R15:0

O

These pins output the real component of the transformed data when DAV and DEN are active.

Otherwise they are high impedance.

I15:0

O

These pins output the imaginary component of the transformed data when DAV and DEN are

active. Otherwise they are high impedance.

DEF

I

The high going edge of DEF is used to internally latch the contents of AUX15:0, which then

define the operating mode. In the simplest system DEF is a power on reset. When DEF is low

the internal control logic is reset.

SCLK

I

System clock used for internal computations.

S3:0

O

These pins indicate the number of shifts towards the binary point which have occurred as the

result of the conditional scaling logic. When the data path right shift is restricted to 2 places

per pass, state 15 is used to indicate an overflow and only a total of 14 shifts is possible.

LFLG

O

This flag indicates that data is being loaded into the device. It goes active in response to an

INEN input, and may be programmed to go in-active after the complete, one quarter, or one

half a data block has been loaded.

INEN

I

The use of this input is mode dependent. It is either used as an active low, load enabling,

signal for the DIS strobe, or it is used to initiate a new block load operation.

DIS

I

The rising edge of this input is used to load data into the device.

DOS

I

The rising edge of this input is used to dump data from the device. In most applications it may

be tied to the DIS input, even if the output rate must be higher than the input rate because of

overlapped data blocks. The DIS input is then internally divided down.

DAV

O

An active low signal that indicates that a transform is complete. Transformed data will then

be output in normal sequential order using DOS. It may be optionally programmed to be

delayed by 24 DOS strobes to match the delay through a PDSP16330.

DEN

I

This input is used to enable the data dump operation when DAV has gone active. If it is tied

low the device will automatically dump data when DAV goes active. Otherwise the device will

wait for the enabling signal to go low before the dump operation commences.

DISAB

I

Only available in the 132 pin GC package. When high the block floating logic is disabled.

VDD

P

+5V pins

GND

P

Ground pins

NOTE. All references to DEF, INEN, DAV, and DEN within the text do not contain the bar designator, signifying an active

low signal. This is considered to be implied by the signal name and is not meant to imply a change in the signal

function.

Functional Operation

The PDSP16515A performs decimation in time, radix 4,

forward or inverse Fast Fourier Transforms. Data is loaded

into an internal workspace RAM in normal sequential order,

processed, and then dumped in the correct order. With real

only input data the processing time can approximately be halved

for a given transform size. Two real inputs then replace a single

complex input, and are processed in parallel.

Either a Blackman-Harris or a Hamming window can be