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MC10SX1190DTR2 Datasheet(PDF) 1 Page - ON Semiconductor |
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MC10SX1190DTR2 Datasheet(HTML) 1 Page - ON Semiconductor |
1 / 6 page © Semiconductor Components Industries, LLC, 2006 January, 2006 − Rev. 3 1 Publication Order Number: MC10SX1190/D MC10SX1190 Fibre Channel Coaxial Cable Driver and Loop Resiliency Circuit Description The MC10SX1190 is a differential receiver, differential transmitter specifically designed to drive coaxial cables. It incorporates the output cable drive capability of the MC10EP89 Coaxial Cable Driver with additional circuitry to multiplex the output cable drive source between the cable receiver or the local transmitter inputs. The multiplexer control circuitry is TTL compatible for ease of operation. The MC10SX1190 is useful as a bypass element for Fibre Channel-Arbitrated Loop (FC-AL) or Serial Storage Architecture (SSA) applications, to create loop style interconnects with fault tolerant, active switches at each device node. This device is particularly useful for back panel applications where small size is desirable. The EP89 style drive circuitry produces swings approximately 70% larger than a standard PECL output. When driving a coaxial cable, proper termination is required at both ends of the line to minimize reflections. The 1.4 V output swings allow for proper termination at both ends of the cable, while maintaining the required swing at the receiving end of the cable. Because of the larger output swings, the QT, QT outputs are terminated into the thevenin equivalent of 50 W to VCC − 3.0 V instead of 50 W to VCC − 2.0 V. Features • 2.5 Gb/s Operation • 425 ps Propagation Delay • 1.4 V Output Swing on the Cable Driving Output • Single Positive SUpply Operation Ranges: VCC = 3.0 V to 3.6 V, VEE = 0 V VCC = 4.5 V to 5.5 V, VEE = 0 V • 75 kW Internal Input Pull Down Resistors • ESD Protection: 2000 V Human Body Model, >100 V Machine Model • These are Pb−Free Devices* 19 20 18 17 16 15 14 2 1 3 4567 VCC 13 8 VCC QR QR VEE DT DT VCC VEE DR DR VCC VCC QT QT VEE 12 9 11 10 VBB VEE SEL VCC Figure 1. 20-Lead TSSOP Pinout: (Top View) *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. TSSOP−20 DT SUFFIX CASE 948E MARKING DIAGRAM SEL Function L H DR → QT DT → QT TRUTH TABLE PIN DESCRIPTION PIN DR/DR QR/QR ECL Buffered Differential Outputs from Receive Cable FUNCTION ECL Diff. Inputs from Receive Cable DT/DT QT/QT ECL Buffered Differential Output to Transmit Cable ECL Differential Input to Transmit Cable SEL VBB Reference Voltage Output TTL Multiplexer Control Signal VCC ECL Positive Supply VEE ECL Negative, 0 Supply A = Assembly Location L = Wafer Lot Y = Year W = Work Week G = Pb−Free Package (Note: Microdot may be in either location) *For additional marking information, refer to Application Note AND8002/D. http://onsemi.com 10SX 1190 ALYWG G See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. ORDERING INFORMATION |
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