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MC10EP446 Datasheet(PDF) 15 Page - ON Semiconductor

Part No. MC10EP446
Description  3.3 V/5 V 8-Bit CMOS/ECL/TTL Data Input Parallel/Serial Converter
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Maker  ONSEMI [ON Semiconductor]
Homepage  http://www.onsemi.com
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MC10EP446 Datasheet(HTML) 15 Page - ON Semiconductor

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MC10EP446, MC100EP446
http://onsemi.com
15
For CKSEL HIGH, as shown in the timing diagrams below, the device will start to latch the parallel input data after the falling
edge of SYNC
¬, followed by the falling edge CLK ­, on the second rising edge of CLK ® (Figures 11 and 12).
Figure 11. Timing Diagram 1:8 Parallel to Serial Conversion with CKSEL HIGH and SYNC
CLK
SYNC
SOUT
PCLK
D0
D0−1
D1
D2
D3
D4
D5
D6
D7
D2−1
D3−1
D4−1
D5−1
D6−1
D7−1
D1−1
CKSEL
D0−2
D1−2
D2−2
D3−2
D4−2
D5−2
D6−2
D7−2
D0−3
D1−3
D2−3
D3−3
D4−3
D5−3
D6−3
D7−3
D0−4
D1−4
D2−4
D3−4
D4−4
D5−4
D6−4
D7−4
1
2
34567
Data Latched
8
9 10
12 13 14
11
Data Latched
Data Latched
Figure 12. Synchronous Release of SYNC for CKSEL HIGH
CLK
SYNC
À
ÁÂ
SYNC
(Asynchronous RESET)
SYNC
(Synchronous ENABLE)
À
ÁÂ
Number of Clock Cycles from Data Latch to SOUT


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