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MC10EP446 Datasheet(PDF) 1 Page - ON Semiconductor

Part No. MC10EP446
Description  3.3 V/5 V 8-Bit CMOS/ECL/TTL Data Input Parallel/Serial Converter
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Maker  ONSEMI [ON Semiconductor]
Homepage  http://www.onsemi.com
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MC10EP446 Datasheet(HTML) 1 Page - ON Semiconductor

 
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© Semiconductor Components Industries, LLC, 2007
February, 2007 − Rev. 9
1
Publication Order Number:
MC10EP446/D
MC10EP446, MC100EP446
3.3 V/5 V 8-Bit
CMOS/ECL/TTL Data Input
Parallel/Serial Converter
Description
The MC10/100EP446 is an integrated 8−bit parallel to serial data
converter. The device is designed with unique circuit topology to
operate for NRZ data rates up to 3.2 Gb/s. The conversion sequence
from parallel data into a serial data stream is from bit D0 to D7. The
parallel input pins D0−D7 are configurable to be threshold controlled by
CMOS, ECL, or TTL level signals. The serial data rate output can be
selected at internal clock data rate or twice the internal clock data rate
using the CKSEL pin.
Control pins are provided to reset (SYNC) and disable internal clock
circuitry (CKEN). In either CKSEL modes, the internal flip−flops are
triggered on the rising edge for CLK and the multiplexers are switched
on the falling edge of CLK, therefore, all associated specification
limits are referenced to the negative edge of the clock input.
Additionally, VBB pin is provided for single−ended input condition.
The 100 Series devices contain temperature compensation network.
Features
3.2 Gb/s Typical Data Rate Capability
Differential Clock and Serial Outputs
VBB Output for Single-ended Input Applications
Asynchronous Data Reset (SYNC)
PECL Mode Operating Range:
VCC = 3.0 V to 5.5 V with VEE = 0 V
NECL Mode Operating Range:
VCC = 0 V with VEE = −3.0 V to −5.5 V
Open Input Default State
Safety Clamp on Inputs
Parallel Interface Can Support PECL, TTL or CMOS
Pb−Free Packages are Available*
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
LQFP−32
FA SUFFIX
CASE 873A
MARKING DIAGRAMS*
xxx
= 10 or 100
A
= Assembly Location
WL, L
= Wafer Lot
YY, Y
= Year
WW, W = Work Week
G or G = Pb−Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
http://onsemi.com
See detailed ordering and shipping information in the package
dimensions section on page 18 of this data sheet.
ORDERING INFORMATION
MCxxx
EP446
AWLYYWWG
QFN32
MN SUFFIX
CASE 488AM
32
1
MCxxx
EP446
AWLYYWWG
G
1


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