MAC4DLM_05 datasheet(5/7 Pages) ONSEMI | Sensitive Gate Triacs Silicon Bidirectional Thyristors

Part No.	MAC4DLM

Description	Sensitive Gate Triacs Silicon Bidirectional Thyristors

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MAC4DLM

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Figure 7. Typical Holding Current versus

Junction Temperature

Figure 8. Typical Latching Current versus

Junction Temperature

Figure 9. Minimum Exponential Static dv/dt

versus Gate−MT1 Resistance

65

110

−40

TJ, JUNCTION TEMPERATURE (°C)

2.0

TJ, JUNCTION TEMPERATURE (°C)

20

110

−40

4.0

2.0

0

1000

10 K

100

RGK, GATE−MT1 RESISTANCE (OHMS)

40

15

10

5.0

1.0

0

−25

5.0

20

50

95

−25

5.0

8.0

10

12

4.0

3.0

5.0

80

50

65

MT2 POSITIVE

MT2 NEGATIVE

Q2

Q3

Q1

VD = 400 V

TJ = 110°C

6.0

−10

35

80

−10

35

95

Q4

Figure 10. Critical Rate of Rise of

Commutating Voltage

1.0

0

di/dt(c), RATE OF CHANGE OF COMMUTATING CURRENT (A/ms)

10

1.0

0.1

2.0

3.0

VPK = 400 V

100°C

90°C

TJ = 110°C

tw

VDRM

(di/dt)c =

6f ITM

1000

f =

1

2 tw

4.0

5.0

6.0

MAC4DLM

20

25

30

35

Figure 11. Simplified Test Circuit to Measure the Critical Rate of Rise of Commutating Current (di/dt)c

LL

1N4007

200 V

+

MEASURE

I

−

CHARGE

CONTROL

CHARGE

TRIGGER

NON-POLAR

CL

51 W

MT2

MT1

1N914

G

200 VRMS

ADJUST FOR

ITM, 60 Hz VAC

Note: Component values are for verification of rated (di/dt)c. See AN1048 for additional information.

RS

ADJUST FOR

di/dt(c)

CS

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