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LM317 Datasheet(PDF) 2 Page - ON Semiconductor

Part No. LM317
Description  1.5 A Adjustable Output, Positive Voltage Regulator
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Maker  ONSEMI [ON Semiconductor]
Homepage  http://www.onsemi.com
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LM317 Datasheet(HTML) 2 Page - ON Semiconductor

 
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LM317, NCV317
http://onsemi.com
2
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Input−Output Voltage Differential
VI−VO
40
Vdc
Power Dissipation
Case 221A
TA = +25°C
PD
Internally Limited
W
Thermal Resistance, Junction−to−Ambient
qJA
65
°C/W
Thermal Resistance, Junction−to−Case
qJC
5.0
°C/W
Case 936 (D2PAK−3)
TA = +25°C
PD
Internally Limited
W
Thermal Resistance, Junction−to−Ambient
qJA
70
°C/W
Thermal Resistance, Junction−to−Case
qJC
5.0
°C/W
Operating Junction Temperature Range
TJ
− 55 to +150
°C
Storage Temperature Range
Tstg
− 65 to +150
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
ELECTRICAL CHARACTERISTICS (VI−VO = 5.0 V; IO = 0.5 A for D2T and T packages; TJ = Tlow to Thigh (Note 1); Imax and Pmax
(Note 2); unless otherwise noted.)
Characteristics
Figure
Symbol
Min
Typ
Max
Unit
Line Regulation (Note 3), TA = +25°C, 3.0 V ≤ VI−VO ≤ 40 V
1
Regline
0.01
0.04
%/V
Load Regulation (Note 3), TA = +25°C, 10 mA ≤ IO ≤ Imax
VO ≤ 5.0 V
VO ≥ 5.0 V
2
Regload
5.0
0.1
25
0.5
mV
% VO
Thermal Regulation, TA = +25°C (Note 4), 20 ms Pulse
Regtherm
0.03
0.07
% VO/W
Adjustment Pin Current
3
IAdj
50
100
mA
Adjustment Pin Current Change, 2.5 V
≤ VI−VO ≤ 40 V,
10 mA
≤ IL ≤ Imax, PD ≤ Pmax
1, 2
DIAdj
0.2
5.0
mA
Reference Voltage, 3.0 V
≤ VI−VO ≤ 40 V,
10 mA
≤ IO ≤ Imax, PD ≤ Pmax
3
Vref
1.2
1.25
1.3
V
Line Regulation (Note 3), 3.0 V
≤ VI−VO ≤ 40 V
1
Regline
0.02
0.07
% V
Load Regulation (Note 3), 10 mA
≤ IO ≤ Imax
VO ≤ 5.0 V
VO ≥ 5.0 V
2
Regload
20
0.3
70
1.5
mV
% VO
Temperature Stability (Tlow ≤ TJ ≤ Thigh)
3
TS
0.7
% VO
Minimum Load Current to Maintain Regulation (VI−VO = 40 V)
3
ILmin
3.5
10
mA
Maximum Output Current
VI−VO ≤ 15 V, PD ≤ Pmax, T Package
VI−VO = 40 V, PD ≤ Pmax, TA = +25°C, T Package
3
Imax
1.5
0.15
2.2
0.4
A
RMS Noise, % of VO, TA = +25°C, 10 Hz ≤ f ≤ 10 kHz
N
0.003
% VO
Ripple Rejection, VO = 10 V, f = 120 Hz (Note 5)
Without CAdj
CAdj = 10 mF
4
RR
66
65
80
dB
Long−Term Stability, TJ = Thigh (Note 6), TA = +25°C for
Endpoint Measurements
3
S
0.3
1.0
%/1.0 k
Hrs.
Thermal Resistance Junction−to−Case, T Package
RqJC
5.0
°C/W
1. Tlow to Thigh = 0° to +125°C, for LM317T, D2T. Tlow to Thigh = − 40° to +125°C, for LM317BT, BD2T, Tlow to Thigh = − 55° to +150°C, for
NCV317BT, BD2T.
2. Imax = 1.5 A, Pmax = 20 W
3. Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account
separately. Pulse testing with low duty cycle is used.
4. Power dissipation within an IC voltage regulator produces a temperature gradient on the die, affecting individual IC components on the die.
These effects can be minimized by proper integrated circuit design and layout techniques. Thermal Regulation is the effect of these
temperature gradients on the output voltage and is expressed in percentage of output change per watt of power change in a specified time.
5. CAdj, when used, is connected between the adjustment pin and ground.
6. Since Long−Term Stability cannot be measured on each device before shipment, this specification is an engineering estimate of average
stability from lot to lot.


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