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EMA6DXV5T1 Datasheet(PDF) 1 Page - ON Semiconductor

Part No. EMA6DXV5T1
Description  Dual Common Emitter Bias Resistor Transistor PNP Silicon Surface Mount Transistors with Monolithic Bias Resistor Network
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Maker  ONSEMI [ON Semiconductor]
Homepage  http://www.onsemi.com
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EMA6DXV5T1 Datasheet(HTML) 1 Page - ON Semiconductor

   
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© Semiconductor Components Industries, LLC, 2003
September, 2003 − Rev. 0
Publication Order Number:
EMA6DXV5T1/D
1
EMA6DXV5T1,
EMA6DXV5T5
Preferred Devices
Dual Common Emitter Bias
Resistor Transistor
PNP Silicon Surface Mount Transistors
with Monolithic Bias Resistor Network
This new series of digital transistors is designed to replace a single
device and its external resistor bias network. The BRT (Bias Resistor
Transistor) contains a single transistor with a monolithic bias network
consisting of two resistors; a series base resistor and a base−emitter
resistor. The BRT eliminates these individual components by
integrating them into a single device. The use of a BRT can reduce
both system cost and board space. The device is housed in the
SOT−553 package which is designed for low power surface mount
applications.
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
Moisture Sensitivity Level: 1
ESD Rating − Human Body Model: Class 1
− Machine Model: Class B
Available in 7 Inch Tape and Reel
Lead−Free Solder Plating
MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Collector-Base Voltage
VCBO
50
Vdc
Collector-Emitter Voltage
VCEO
50
Vdc
Collector Current
IC
100
mAdc
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
Unit
Total Device Dissipation
TA = 25°C
Derate above 25
°C
PD
230 (Note 1)
338 (Note 2)
1.8 (Note 1)
2.7 (Note 2)
mW
°C/W
Thermal Resistance −
Junction-to-Ambient
RqJA
540 (Note 1)
370 (Note 2)
°C/W
Thermal Resistance −
Junction-to-Lead
RqJL
264 (Note 1)
287 (Note 2)
°C/W
Junction and Storage
Temperature Range
TJ, Tstg
− 55 to +150
°C
DEVICE MARKING AND RESISTOR VALUES
Device
Marking
R1 (K)
R2 (K)
EMA6DXV5T1
UD
47
1. FR−4 @ Minimum Pad
2. FR−4 @ 1.0 x 1.0 inch Pad
UD M
Preferred devices are recommended choices for future use
and best overall value.
UD= Specific Device Code
M = Date Code
PNP SILICON
BIAS RESISTOR
TRANSISTOR
http://onsemi.com
R2
R1
MARKING DIAGRAM
SOT−553
CASE 463B
1
5
1
5
Device
Package
Shipping
ORDERING INFORMATION
EMA6DXV5T1
SOT−553
4 mm pitch
4000/Tape & Reel
EMA6DXV5T5
SOT−553
2 mm pitch
8000/Tape & Reel
(3)
(2)
(1)
(4)
(5) / (6)
EMA6 / UMA6N


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