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74HC74 Datasheet(PDF) 4 Page - ON Semiconductor

Part No. 74HC74
Description  Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS
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Maker  ONSEMI [ON Semiconductor]
Homepage  http://www.onsemi.com
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74HC74 Datasheet(HTML) 4 Page - ON Semiconductor

   
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74HC74
http://onsemi.com
4
TIMING REQUIREMENTS (Input tr = tf = 6.0 ns)
Symbol
Parameter
VCC
(V)
Guaranteed Limit
Unit
– 55 to
25_C
v 85_C
v 125_C
tsu
Minimum Setup Time, Data to Clock
(Figure 3)
2.0
3.0
4.5
6.0
80
35
16
14
100
45
20
17
120
55
24
20
ns
th
Minimum Hold Time, Clock to Data
(Figure 3)
2.0
3.0
4.5
6.0
3.0
3.0
3.0
3.0
3.0
3.0
3.0
3.0
3.0
3.0
3.0
3.0
ns
trec
Minimum Recovery Time, Set or Reset Inactive to Clock
(Figure 2)
2.0
3.0
4.5
6.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
ns
tw
Minimum Pulse Width, Clock
(Figure 1)
2.0
3.0
4.5
6.0
60
25
12
10
75
30
15
13
90
40
18
15
ns
tw
Minimum Pulse Width, Set or Reset
(Figure 2)
2.0
3.0
4.5
6.0
60
25
12
10
75
30
15
13
90
40
18
15
ns
tr, tf
Maximum Input Rise and Fall Times
(Figures 1, 2, 3)
2.0
3.0
4.5
6.0
1000
800
500
400
1000
800
500
400
1000
800
500
400
ns
ORDERING INFORMATION
Device
Package
Shipping
74HC74D
SOIC−14
55 Units / Rail
74HC74DG
SOIC−14
(Pb−Free)
74HC74DR2
SOIC−14
2500 / Tape & Reel
74HC74DR2G
SOIC−14
(Pb−Free)
74HC74DTR2
TSSOP−14*
74HC74DTR2G
TSSOP−14*
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*This package is inherently Pb−Free.


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