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TPS72501 Datasheet(PDF) 3 Page - Texas Instruments

Part No. TPS72501
Description  LOW INPUT VOLTAGE, 1-A LOW-DROPOUT LINEAR REGULATORS WITH SUPERVISOR
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Maker  TI [Texas Instruments]
Homepage  http://www.ti.com
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TPS72501 Datasheet(HTML) 3 Page - Texas Instruments

 
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Line regulation (mV)
+ % V
V
O
5.5 V
* VImin
100
1000
PACKAGE DISSIPATION RATINGS
ELECTRICAL CHARACTERISTICS
TPS72501
TPS72515, TPS72516
TPS72518, TPS72525
SLVS341D – MAY 2002 – REVISED MARCH 2004
PACKAGE
BOARD
RθJC
RθJA
DDPAK
High K(1)
2
°C/W
23
°C/W
SOT223
Low K(2)
15
°C/W
53
°C/W
D-8
High K(1)
39.4
°C/W
55
°C/W
(1)
The JEDEC high-K (2s2p) board design used to derive this data was a 3-inch x 3-inch (7.5-cm x 7.5-cm), multilayer board with 1 ounce
internal power and ground planes and 2 ounce copper traces on top and bottom of the board.
(2)
The JEDEC low-K (1s) board design used to derive this data was a 3-inch x 3-inch (7.5-cm x 7.5-cm), two-layer board with 2 ounce
copper traces on top of the board.
over recommended operating free-air temperature range V
I = VO(typ) + 1 V, IO= 1 mA, EN = IN, Co = 1 µF, Ci = 1 µF (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Bandgap voltage reference
1.177
1.220
1.263
V
TPS72501
0 µA < IO < 1 A
(1)
1.22 V
≤ V
O ≤ 5.5 V
0.965 VO
1.035 VO
Adjustable
TJ = 25°C
1.5
TPS72515
0 µA< IO < 1 A
1.8 V
≤ V
I ≤ 5.5 V
1.47
1.53
TJ = 25°C
1.6
TPS72516
VO
Output voltage
V
0 µA < IO < 1 A
2.6 V
≤ V
I ≤ 5.5 V
1.568
1.632
TJ = 25°C
1.8
TPS72518
0 µA < IO < 1 A
2.8 V
≤ V
I ≤ 5.5 V
1.764
1.836
TJ = 25°C
2.5
TPS72525
0 µA < IO < 1 A
3.5 V
≤ V
I ≤ 5.5 V
2.45
2.55
IO = 0 µA
75
120
I
Ground current
µA
IO = 1 A
210
300
EN < 0.4 V
TJ = 25°C
0.2
Standby current
µA
EN < 0.4 V
1
BW = 200 Hz to 100 kHz,
Co = 10 µF, IO = 1
Vn
Output noise voltage
150
µV
TJ = 25°C
mA
PSRR
Ripple rejection
f = 1 kHz, Co = 10 µF
TJ = 25°C
60
dB
Current limit(2)
1.1
1.6
2.3
A
Output voltage line regulation
VO + 1 V < VI≤ 5.5 V
-0.15
0.02
0.15
%/V
(
∆V
O/VO)
(3)
Output voltage load regulation
0 µA < IO < 1 A
-0.25
0.05
0.25
%/A
VIH
EN high level input(2)
1.3
V
VIL
EN low level input(2)
-0.2
0.4
II
EN input current
EN = 0 V or VI
0.01
100
nA
I(FB)
Feedback current
TPS72501
V(FB) = 1.22
-100
100
nA
UVLO threshold
VCC rising
1.45
1.57
1.70
V
UVLO hysteresis
TJ = 25°C, VCC rising
50
mV
UVLO deglitch
TJ = 25°C, VCC rising
10
µs
UVLO delay
TJ = 25°C, VCC rising
100
µs
(1)
Minimum IN operating voltage used for testing is VO(typ) + 1 V.
(2)
Test condition includes output voltage VO = VO - 15% and pulse duration = 10 ms.
(3)
VImin = (VO + 1) or 1.8 V whichever is greater.
3


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