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CD74HC93 Datasheet(PDF) 6 Page - Texas Instruments

Part No. CD74HC93
Description  High-Speed CMOS Logic 4-Bit Binary Ripple Counter
Download  10 Pages
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Maker  TI [Texas Instruments]
Homepage  http://www.ti.com
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CD74HC93 Datasheet(HTML) 6 Page - Texas Instruments

 
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6
HCT TYPES
Propagation Delay Time
tPLH, tPHL
CL = 50pF
4.5
-
-
34
-
43
-
51
ns
CP0 to Q0
CL = 15pF
5
-
14
-
----
ns
CP1 to Q1
tPLH, tPHL CL = 50pF
4.5
-
-
34
-
43
-
51
ns
CL = 15pF
5
-
-
-
----
ns
CP1 to Q2
tPLH, tPHL CL = 50pF
4.5
-
-
46
-
58
-
69
ns
CL = 15pF
5
-
-
-
----
ns
CP1 to Q3
tPLH, tPHL CL = 50pF
4.5
-
-
58
-
73
-
87
ns
CL = 15pF
5
-
24
-
----
ns
MR1, MR2 to Qn
tPLH, tPHL CL = 50pF
4.5
-
-
33
-
41
-
50
ns
CL = 15pF
5
-
13
-
----
ns
Output Transition Time
tTLH, tTHL
CL = 50pF
4.5
-
-
15
-
19
-
22
ns
Input Capacitance
CIN
CL = 50pF
-
-
-
10
-
10
-
10
pF
Power Dissipation Capacitance
CPD
-
-
-
25
-
----
pF
Switching Specifications Input tr, tf = 6ns (Continued)
PARAMETER
SYMBOL
TEST
CONDITIONS
VCC
(V)
25oC
-40oC TO 85oC
-55oC TO
125oC
UNITS
MIN
TYP
MAX
MIN
MAX
MIN
MAX
Test Circuits and Waveforms
FIGURE 1. HC SETUP TIMES, HOLD TIMES, REMOVAL TIME,
AND PROPAGATION DELAY TIMES FOR EDGE
TRIGGERED SEQUENTIAL LOGIC CIRCUITS
FIGURE 2. HCT SETUP TIMES, HOLD TIMES, REMOVAL TIME,
AND PROPAGATION DELAY TIMES FOR EDGE
TRIGGERED SEQUENTIAL LOGIC CIRCUITS
trCL
tfCL
GND
VCC
GND
VCC
50%
90%
10%
GND
CLOCK
INPUT
DATA
INPUT
OUTPUT
SET, RESET
OR PRESET
VCC
50%
50%
90%
10%
50%
90%
tREM
tPLH
tSU(H)
tTLH
tTHL
tH(L)
tPHL
IC
CL
50pF
tSU(L)
tH(H)
trCL
tfCL
GND
3V
GND
3V
1.3V
2.7V
0.3V
GND
CLOCK
INPUT
DATA
INPUT
OUTPUT
SET, RESET
OR PRESET
3V
1.3V
1.3V
1.3V
90%
10%
1.3V
90%
tREM
tPLH
tSU(H)
tTLH
tTHL
tH(L)
tPHL
IC
CL
50pF
tSU(L)
1.3V
tH(H)
1.3V
CD74HC93, CD74HCT93


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