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SNJ55LVDS32FK Datasheet(PDF) 7 Page - Texas Instruments |
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SNJ55LVDS32FK Datasheet(HTML) 7 Page - Texas Instruments |
7 / 31 page www.ti.com SN65LVDSxxxx ELECTRICAL CHARACTERISTICS SN65LVDSxxxx SWITCHING CHARACTERISTICS SN55LVDS32, SN65LVDS32 SN65LVDS3486, SN65LVDS9637 SLLS262N – JULY 1997 – REVISED MARCH 2004 over recommended operating conditions (unless otherwise noted) SN65LVDS32 SN65LVDS3486 PARAMETER TEST CONDITIONS UNIT SN65LVDS9637 MIN TYP(1) MAX VIT+ Positive-going differential input voltage threshold See Figure 2 and Table 1 100 mV VIT- Negative-going differential input voltage threshold(2) See Figure 2 and Table 1 –100 mV IOH = –8 mA 2.4 VOH High-level output voltage V IOH = –4 mA 2.8 VOL Low-level output voltage IOL = 8 mA 0.4 V Enabled, No load 10 18 SN65LVDS32, SN65LVDS3486 ICC Supply current Disabled 0.25 0.5 mA SN65LVDS9637 No load 5.5 10 VI = 0 –2 –10 –20 II Input current (A or B inputs) µA VI = 2.4 V –1.2 –3 II(OFF) Power-off input current (A or B inputs) VCC = 0, VI = 3.6 V 6 20 µA IIH High-level input current (EN, G, or G inputs) VIH = 2 V 10 µA IIL Low-level input current (EN, G, or G inputs) VIL = 0.8 V 10 µA IOZ High-impedance output current VO = 0 or VCC ±10 µA (1) All typical values are at TA = 25°C and with VCC = 3.3 V. (2) The algebraic convention, in which the less-positive (more-negative) limit is designated minimum, is used in this data sheet for the negative-going differential input voltage threshold only. over recommended operating conditions (unless otherwise noted) SN65LVDS32 SN65LVDS3486 PARAMETER TEST CONDITIONS UNIT SN65LVDS9637 MIN TYP MAX tPLH Propagation delay time, low-to-high-level output 1.5 2.1 3 ns tPHL Propagation delay time, high-to-low-level output 1.5 2.1 3 ns tsk(p) Pulse skew (|tPHL - tPLH|) 0 0.4 ns tsk(o) Channel-to-channel output skew(1) CL = 10 pF, See Figure 3 0.1 0.3 ns tsk(pp) Part-to-part skew(2) 1 ns tr Output signal rise time, 20% to 80% 0.6 ns tf Output signal fall time, 80% to 20% 0.7 ns tPHZ Propagation delay time, high-level-to-high-impedance output 6.5 12 ns tPLZ Propagation delay time, low-level-to-high-impedance output 5.5 12 ns See Figure 4 tPZH Propagation delay time, high-impedance-to-high-level output 8 12 ns tPZL Propagation delay time, high-impedance-to-low-level output 3 12 ns (1) tsk(o) is the skew between specified outputs of a single device with all driving inputs connected together and the outputs switching in the same direction while driving identical specified loads. (2) tsk(pp) is the magnitude of the difference in propagation delay times between any specified terminals of two devices when both devices operate with the same supply voltages, same temperature, and have identical packages and test circuits. 7 Submit Documentation Feedback |
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