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ZL50063 Datasheet(PDF) 30 Page - Zarlink Semiconductor Inc

Part No. ZL50063
Description  16K-Channel Digital Switch with High Jitter Tolerance, Single Rate (32Mbps), and 32 Inputs and 32 Output
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Maker  ZARLINK [Zarlink Semiconductor Inc]
Homepage  http://www.zarlink.com
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ZL50063 Datasheet(HTML) 30 Page - Zarlink Semiconductor Inc

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ZL50063
Data Sheet
30
Zarlink Semiconductor Inc.
11.2
Backplane Data Memory Bit Definition
The 8-bit Backplane Data Memory (BDM) has 8,192 positions. The locations are associated with the Backplane
input streams and channels. As explained previously, address bits A13-A0 of the microprocessor define the
addresses of the streams and the channels. The BDM is read-only and configured as follows:
Note that the Backplane Data Memory is actually an 8-bit wide memory. The most significant 8 bits expressed in the
table above are presented to provide 16-bit microprocessor read accesses.
11.3
Local Connection Memory Bit Definition
The Local Connection Memory (LCM) has 8,192 addresses of 16-bit words. Each address, accessed through bits
A13-A0 of the microprocessor port, is allocated to an individual Local output stream and channel. The bit definition
for each 16-bit word is presented in Table 8 for Source-to-Local connections.
The most-significant bit in the memory location, LSRC, selects the switch configuration for Backplane-to-Local or
Local-to-Local. When the per-channel Message Mode is selected (LMM memory bit = HIGH), the lower byte of the
LCM word (LCAB[7:0]) will be transmitted as data on the output stream (LSTo0-15) in place of data defined by the
Source Control, Stream and Channel Address bits.
Bit
Name
Description
15:8
Reserved
Set to a default value of 8’h00.
7:0
BDM
Backplane Data Memory - Backplane Input Channel Data.
The BDM[7:0] bits contain the timeslot data from the Backplane side input TDM
stream. BDM[7] corresponds to the first bit received, i.e. bit 7 in ST-BUS mode,
bit 0 in GCI-Bus mode. See Figure 6, ST-BUS and GCI-Bus Input Timing
Diagram for the arrival order of the bits.
Table 7 - Backplane Data Memory (BDM) Bits
Bit
Name
Description
15
LSRC
Local Source Control Bit
When LOW, the source is from the Backplane input port (Backplane Data Memory).
When HIGH, the source is from the Local input port (Local Data Memory).
Ignored when LMM is set HIGH.
14
LMM
Local Message Mode Bit
When LOW, the channel is in Connection Mode (data to be output on channel originated in
Local or Backplane Data Memory).
When HIGH, the channel is in Message Mode (data to be output on channel originated in
Local Connection Memory).
13
LE
Local Output Enable Bit
When LOW, the channel may be high impedance, either at the device output, or set by an
external buffer dependent upon the LORS pin.
When HIGH, the channel is active.
12:9
LSAB[3:0]
Source Stream Address Bits
The binary value of these 4 bits represents the input stream number.
Ignored when LMM is set HIGH.
Table 8 - LCM Bits for Source-to-Local Switching


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