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ZL50020 Datasheet(PDF) 55 Page - Zarlink Semiconductor Inc

Part # ZL50020
Description  Enhanced 2 K Digital Switch
Download  83 Pages
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Manufacturer  ZARLINK [Zarlink Semiconductor Inc]
Direct Link  http://www.zarlink.com
Logo ZARLINK - Zarlink Semiconductor Inc

ZL50020 Datasheet(HTML) 55 Page - Zarlink Semiconductor Inc

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ZL50020
Data Sheet
55
Zarlink Semiconductor Inc.
Bit
Name
Description
15 - 8
Unused
Reserved
In normal functional mode, these bits MUST be set to zero.
7 - 0
ST[n]
BRS7 - 0
Stream[n] BER Receive Start Bits
The binary value of these bits refers to the input channel in which the BER data starts
to be compared.
Note: [n] denotes input stream from 0 - 31.
Table 27 - BER Receiver Start Register [n] (BRSR[n]) Bits
Bit
Name
Description
15 - 9
Unused
Reserved
In normal functional mode, these bits MUST be set to zero.
8 - 0
ST[n]
BL8 - 0
Stream[n] BER Length Bits
The binary value of these bits refers to the number of consecutive channels expected
to receive the BER pattern. The maximum number of BER channels is 32, 64, 128 and
256 for the data rates of 2.048 Mbps, 4.096 Mbps, 8.192 Mbps and 16.384 Mbps
respectively. The minimum number of BER channels is 1. If these bits are set to zero,
no BER test will be performed.
Note: [n] denotes input stream from 0 - 31.
Table 28 - BER Receiver Length Register [n] (BRLR[n]) Bits
External Read/Write Address: 0300H - 031FH
Reset Value: 0000H
15
14
13
12
11
10
9
8
7654
3210
000000
00
ST[n]
BRS7
ST[n]
BRS6
ST[n]
BRS5
ST[n]
BRS4
ST[n]
BRS3
ST[n]
BRS2
ST[n]
BRS1
ST[n]
BRS0
External Read/Write Address: 0320H - 03FH
Reset Value: 0000H
15
14
13
12
11
10
9
8
7654321
0
0000000
ST[n]
BL8
ST[n]
BL7
ST[n]
BL6
ST[n]
BL5
ST[n]
BL4
ST[n]
BL3
ST[n]
BL2
ST[n]
BL1
ST[n]
BL0


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