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ZL50011GDG2 Datasheet(PDF) 78 Page - Zarlink Semiconductor Inc |
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ZL50011GDG2 Datasheet(HTML) 78 Page - Zarlink Semiconductor Inc |
78 / 83 page ZL50011 Data Sheet 78 Zarlink Semiconductor Inc. AC Electrical Characteristics† - ST-BUS Output Tristate Timing † Characteristics are over recommended operating conditions unless otherwise stated. ‡ Typical figures are at 25 °C and are for design aid only: not guaranteed and not subject to production testing. * Note 1: High Impedance is measured by pulling to the appropriate rail with RL, with timing corrected to cancel the time taken to discharge CL. Figure 45 - Serial Output and External Control Figure 46 - Output Driver Enable (ODE) Characteristic Sym. Min. Typ.‡ Max. Units Test Conditions 1 STo Delay - Active to High-Z STo Delay - High-Z to Active 2.048 Mbps 4.096 Mbps 8.192 Mbps tDZ, tZD 15 15 15 ns ns ns RL=1 K, CL=30 pF, See Note 1. 2 Output Driver Enable (ODE) Delay - High-Z to Active 2.048 Mbps 4.096 Mbps 8.192 Mbps tZD_ODE 45 45 45 ns ns ns 2 Output Driver Disable (ODE) Delay - Active to High-Z 2.048 Mbps 4.096 Mbps 8.192 Mbps tDZ_ODE 30 30 30 ns ns ns tDZ STo tZD STo CKo0-2 VTT VTT Tri-state Valid Data VTT Tri-state Valid Data VTT HiZ HiZ STo ODE tZD_ODE Valid Data VTT tDZ_ODE |
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