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ZL50016 Datasheet(PDF) 14 Page - Zarlink Semiconductor Inc |
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ZL50016 Datasheet(HTML) 14 Page - Zarlink Semiconductor Inc |
14 / 81 page ZL50016 Data Sheet 14 Zarlink Semiconductor Inc. B6, C6, D5, D4, B4, B3, C5, C4, E3, C2, B2, D2, F3, F4, E2, F2 179, 180, 181, 182, 183, 184, 185, 187, 198, 200, 201, 202, 203, 204, 205, 206, STi0 - 15 Serial Input Streams 0 to 15 (5 V-Tolerant Inputs with Internal Pull-downs) The data rate of each input stream can be selected independently using the Stream Input Control Registers (SICR[n]). In the 2.048 Mbps mode, these pins accept serial TDM data streams at 2.048 Mbps with 32 channels per frame. In the 4.096 Mbps mode, these pins accept serial TDM data streams at 4.096 Mbps with 64 channels per frame. In the 8.192 Mbps mode, these pins accept serial TDM data streams at 8.192 Mbps with 128 channels per frame. In the 16.384 Mbps mode, these pins accept TDM data streams at 16.384 Mbps with 256 channels per frame. N4, P4, R4, P5, N13, P11, R14, R15, M15, L15, L13, L14, E14, D13, D15, C15 6, 7, 9, 10, 51, 52, 53, 54, 70, 72, 73, 74, 115, 116, 117, 118 STio 0 - 15 Serial Output Streams 0 to 15 (5 V-Tolerant Slew-Rate-Limited Three-state I/Os with Enabled Internal Pull-downs) The data rate of each output stream can be selected independently using the Stream Output Control Registers (SOCR[n]). In the 2.048 Mbps mode, these pins output serial TDM data streams at 2.048 Mbps with 32 channels per frame. In the 4.096 Mbps mode, these pins output serial TDM data streams at 4.096 Mbps with 64 channels per frame. In the 8.192 Mbps mode, these pins output serial TDM data streams at 8.192 Mbps with 128 channels per frame. In the 16.384 Mbps mode, these pins output serial TDM data streams at 16.384 Mbps with 256 channels per frame.These output streams can be used as bi-directionals by programming BDL (bit 6) of Internal Mode Selection (IMS) register. R3, P6, R5, N5, P12, N15, P13, P15 11, 12, 13, 14, 55, 56, 58, 59 STOHZ 0 - 7 Serial Output Streams High Impedance Control 0 to 7 (5 V-Tolerant Slew-Rate-Limited Three-state Outputs) These pins are used to enable (or disable) external three-state buffers. When an output channel is in the high impedance state, the STOHZ drives high for the duration of the corresponding output channel. When the STio channel is active, the STOHZ drives low for the duration of the corresponding output channel. STOHZ outputs are available for STio0 - 7 only. B15 141 ODE Output Drive Enable (5 V-Tolerant Input with Internal Pull-up) This is the output enable control for STio0 - 15 and the output-driven-high control for STOHZ0 - 7. When it is high, STio0 - 15 and STOHZ0 - 7 are enabled. When it is low, STio0 - 15 are tristated and STOHZ0 - 7 are driven high. M4, N6, R6, P7, R7, N7, M8, N8, P8, R8, M9, N9, R9, N10, P9, R10 16, 18, 20, 22, 23, 24, 25, 26, 27, 28, 30, 32, 34, 36, 37, 38 D0 - 15 Data Bus 0 to 15 (5 V-Tolerant Slew-Rate-Limited Three-state I/Os) These pins form the 16-bit data bus of the microprocessor port. PBGA Pin Number LQFP Pin Number Pin Name Description |
Similar Part No. - ZL50016_06 |
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Similar Description - ZL50016_06 |
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