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ZL50011 Datasheet(PDF) 79 Page - Zarlink Semiconductor Inc |
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ZL50011 Datasheet(HTML) 79 Page - Zarlink Semiconductor Inc |
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79 / 83 page  ZL50011 Data Sheet 79 Zarlink Semiconductor Inc. AC Electrical Characteristics - Motorola Non-Multiplexed Bus Mode Figure 47 - Motorola Non-Multiplexed Bus Timing Characteristics Sym. Min. Typ. Max. Units Test Conditions2 1 CS setup from DS falling tCSS 0ns 2 R/W setup from DS falling tRWS 10 ns 3 Address setup from DS falling tADS 5ns 4 DS delay from the rising edge of DTA to the falling edge of the DS tDSD 50 ns 5 CS delay from the rising edge of DTA to the falling edge of the CS tCSD 50 ns 6 CS hold after DS rising tCSH 0ns 7 R/W hold after DS rising tRWH 0ns 8 Address hold after DS rising tADH 0ns 9 Data setup from DTA Low on Read tDDR 20 ns CL=30 pF 10 Data hold on read tDHR 39 ns CL=30 pF, RL=1 K (Note 1) 11 Data setup from DS falling on write tWDS 10 ns 12 Data hold on write tDHW 0ns 13 Acknowledgment Delay: Reading/Writing Registers Reading/Writing Memory tAKD 120/105 200/150 ns ns CL=30 pF CL=30 pF 14 Acknowledgment Hold Time tAKH 20 ns CL=30 pF, RL=1 K (Note 1) Note 1: High Impedance is measured by pulling to the appropriate rail with RL, with timing corrected to cancel time taken to discharge CL. Note 2: A delay of 600 microseconds must be applied before the first microprocessor access is performed after the RESET pin is set high. DS A0-A11 CS D0-D15 D0-D15 READ WRITE tCSH tADH tDHR tRWS R/W tADS tRWH tDHW tAKD tWDS tDDR tAKH DTA VTT VTT VTT VTT VTT VTT VTT VALID ADDRESS VALID READ DATA VALID WRITE DATA tCSS tCSD tDSD |
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