ZL50010_06 datasheet(8/87 Pages) ZARLINK

Part #	ZL50010

Description	Flexible 512 Channel DX with Enhanced DPLL

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Manufacturer	ZARLINK [Zarlink Semiconductor Inc]

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ZL50010

Data Sheet

8

Zarlink Semiconductor Inc.

Changes Summary

The following table captures the changes from the July 2004 issue.

Page

Item

Change

12, 35, 45

(1) Pin Descritpion - Signal XTALi

(2) 2.9.3 “DPLL Bypass Mode“

(3) 3.0 “Oscillator Requirements“

•

Clarified initialization input clock requirement in

DPLL Bypass mode.

18

2.1.4 “Improved Input Jitter Tolerance with

Frame Boundary Determinator“

•

Added a new section to describe the improved

input jitter tolerance with the frame boundary

determinator.

51

Table 17 - “Control Register (CR) Bits“ - bits

“FBDMODE“ and “FBDEN“

•

Renamed bit 15 from Unused to FBDMODE and

added description to clarify the frame boundary

determinator operation.

•

Clarified FBDEN description.

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