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TAS5152DKDRG4 Datasheet(PDF) 10 Page - Texas Instruments |
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TAS5152DKDRG4 Datasheet(HTML) 10 Page - Texas Instruments |
10 / 26 page TAS5152 SLES127A − FEBRUARY 2005 − REVISED NOVEMBER 2005 www.ti.com 10 ELECTRICAL CHARACTERISTICS (continued) RL= 4 Ω. FPWM = 384 kHz, unless otherwise noted. All performance is in accordance with recommended operating conditions unless otherwise specified. SYMBOL PARAMETER CONDITIONS TAS5152 SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS I/O Protection Vuvp,G Undervoltage protection limit, GVDD_x 9.8 V Vuvp,hyst(1) Undervoltage protection hysteresis 250 mV OTW(1) Overtemperature warning 115 125 135 _C OTWHYST(1) Temperature drop needed below OTW temp. for OTW to be inactive after the OTW event 25 _C OTE(1) Overtemperature error 145 155 165 _C OTE-OTW differential (1) OTE-OTW differential 30 _C OTEHYST(1) Temperature drop needed below OTE temp. for SD to be released following an OTE event 25 _C OLPC Overload protection counter Fpwm = 384 kHz 1.25 ms IOC Overcurrent limit protection Resistor-programmable, high end, ROCP = 15 kΩ 8.5 10.8 11.8 A IOCT Overcurrent response time 210 ns ROCP OC programming resistor range Resistor tolerance = 5% 15 69 k Ω RPD Internal pulldown resistor at the output of each half-bridge Connected when RESET is active to provide bootstrap capacitor charge. Not used in SE mode 2.5 k Ω Static Digital Specifications VIH High-level input voltage PWM_A, PWM_B, PWM_C, PWM_D, M1, M2, M3, 2 V VIL Low-level input voltage PWM_D, M1, M2, M3, RESET_AB, RESET_CD 0.8 V Leakage Input leakage current –10 10 µA OTW/SHUTDOWN (SD) RINT_PU Internal pullup resistance, OTW to VREG, SD to VREG 20 26 32 k Ω Internal pullup resistor 3 3.3 3.6 VOH High-level output voltage External pullup of 4.7 k Ω to 5 V 4.5 5 V VOL Low-level output voltage IO = 4 mA 0.2 0.4 V FANOUT Device fanout OTW , SD No external pullup 30 Devices (1) Specified by design |
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