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SST34HF164C-70-4E-LBK Datasheet(PDF) 4 Page - Silicon Storage Technology, Inc |
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SST34HF164C-70-4E-LBK Datasheet(HTML) 4 Page - Silicon Storage Technology, Inc |
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4 / 26 page  4 Preliminary Specifications 16 Mbit Dual-Bank Flash + 2/4 Mbit SRAM ComboMemory SST34HF162C / SST34HF164C ©2004 Silicon Storage Technology, Inc. S71269-01-000 9/04 Note: DQ7, DQ6, and DQ2 require a valid address when reading status information. Data Protection The SST34HF162C/164C provide both hardware and soft- ware features to protect nonvolatile data from inadvertent writes. Hardware Data Protection Noise/Glitch Protection: A WE# or BEF# pulse of less than 5 ns will not initiate a Write cycle. VDD Power Up/Down Detection: The Write operation is inhibited when VDD is less than 1.5V. Write Inhibit Mode: Forcing OE# low, BEF# high, or WE# high will inhibit the Write operation. This prevents inadvert- ent writes during power-up or power-down. Software Data Protection (SDP) The SST34HF162C/164C provide the JEDEC standard Software Data Protection scheme for all data alteration operations, i.e., Program and Erase. Any Program opera- tion requires the inclusion of the three-byte sequence. The three-byte load sequence is used to initiate the Program operation, providing optimal protection from inadvertent Write operations, e.g., during the system power-up or power-down. Any Erase operation requires the inclusion of six-byte sequence. The SST34HF162C/164C are shipped with the Software Data Protection permanently enabled. See Table 5 for the specific software command codes. Dur- ing SDP command sequence, invalid commands will abort the device to Read mode within TRC. The contents of DQ15- DQ8 are “Don’t Care” during any SDP command sequence. Product Identification The Product Identification mode identifies the device as SST34HF162C or SST34HF164C and the manufacturer as SST. This mode may be accessed by software opera- tions only. The hardware device ID Read operation, which is typically used by programmers cannot be used on this device because of the shared lines between flash and SRAM in the multi-chip package. Therefore, application of high voltage to pin A9 may damage this device. Users may use the software Product Identification operation to identify the part (i.e., using the device ID) when using multiple man- ufacturers in the same socket. For details, see Tables 4 and 5 for software operation, Figure 14 for the Software ID Entry and Read timing diagram and Figure 20 for the ID Entry command sequence flowchart. Note: BK = Bank Address (A19-A18) Product Identification Mode Exit In order to return to the standard Read mode, the Software Product Identification mode must be exited. Exit is accom- plished by issuing the Software ID Exit command sequence, which returns the device to the Read mode. This command may also be used to reset the device to the Read mode after any inadvertent transient condition that apparently causes the device to behave abnormally, e.g., not read correctly. Please note that the Software ID Exit command is ignored during an internal Program or Erase operation. See Table 5 for software command codes, Fig- ure 15 for timing waveform and Figure 20 for a flowchart. Erase- Suspend Mode Read From Erase Suspended Sector/ Block 1 1 Toggle Read From Non-Erase Suspended Sector/ Block Data Data Data Program DQ7# Toggle No Toggle T1.0 1269 TABLE 1: WRITE OPERATION STATUS Status DQ7 DQ6 DQ2 TABLE 2: PRODUCT IDENTIFICATION ADDRESS DATA Manufacturer’s ID BK0000H 00BFH Device ID SST34HF162C/164C BK0001H 734BH T2.1 1269 |
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