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PGA2320IDWG4 Datasheet(PDF) 7 Page - Burr-Brown (TI)

[Old version datasheet] Texas Instruments acquired Burr-Brown Corporation. Click here to check the latest version.
Part # PGA2320IDWG4
Description  Stereo Audio Volume Control
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Manufacturer  BURR-BROWN [Burr-Brown (TI)]
Direct Link  http://www.burr-brown.com
Logo BURR-BROWN - Burr-Brown (TI)

PGA2320IDWG4 Datasheet(HTML) 7 Page - Burr-Brown (TI)

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PGA2320
SBOS312B − JULY 2004 − REVISED DECEMBER 2004
www.ti.com
7
GENERAL DESCRIPTION
The PGA2320 is a stereo audio volume control. It may be
used in a wide array of professional and consumer audio
equipment. The PGA2320 is fabricated in a mixed-signal
BiCMOS process in order to take advantage of the
superior analog characteristics that the process offers.
The heart of the PGA2320 is a resistor network, an analog
switch array, and a high-performance bipolar op amp
stage. The switches are used to select taps in the resistor
network that, in turn, determine the gain of the amplifier
stage. Switch selections are programmed using a serial
control port. The serial port allows connection to a wide
variety of host controllers. Figure 1 shows a functional
block diagram of the PGA2320.
POWER-UP STATE
On power up, all internal flip-flops are reset. The gain byte
value for both the left and right channels are set to 00HEX,
or mute condition. The gain will remain at this setting until
the host controller programs new settings for each channel
via the serial control port.
ANALOG INPUTS AND
OUTPUTS
The PGA2320 includes two independent channels,
referred to as the left and right channels. Each channel has
a corresponding input and output pin. The input and output
pins are unbalanced, or referenced to analog ground
(either AGNDR or AGNDL). The inputs are named VINR
(pin 9) and VINL (pin 16), while the outputs are named
VOUTR (pin 11) and VOUTL (pin 14).
It is important to drive the PGA2320 with a low source
impedance. If a source impedance of greater than 600
Ω is
used, the distortion performance of the PGA2320 will
begin to degrade.
MUX
Serial
Control
Port
MUX
ZCEN
CS
SCLK
SDI
SDO
MUTE
V
OUTR
V
OUTL
V
INL
AGNDL
AGNDR
V
INR
V
A+VA
V
D+DGND
12
13
4
5
11
7
3
6
2
1
8
14
16
15
10
9
8
8
8
8
Figure 1. PGA2320 Block Diagram


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