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ZL30102 Datasheet(PDF) 2 Page - Zarlink Semiconductor Inc

Part No. ZL30102
Description  T1/E1 Stratum 4/4E Redundant System Clock Synchronizer for DS1/E1 and H.110
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Maker  ZARLINK [Zarlink Semiconductor Inc]
Homepage  http://www.zarlink.com
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ZL30102 Datasheet(HTML) 2 Page - Zarlink Semiconductor Inc

 
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ZL30102
Data Sheet
2
Zarlink Semiconductor Inc.
Description
The ZL30102 DS1/E1 Synchronizer contains a digital phase-locked loop (DPLL), which provides timing and
synchronization for DS1/E1 transmission equipment deploying redundant network clocks.
The ZL30102 generates ST-BUS and other TDM clock and framing signals that are phase locked to one of three
network references or to another system master-clock reference. It helps ensure system reliability by monitoring its
references for frequency accuracy and stability and by maintaining a tight phase alignment between the primary
master-clock and secondary master clock outputs even in the presence of high network jitter.
The ZL30102 is intended to be the central timing and synchronization resource for network equipment that
complies with Telcordia, ETSI, ITU-T and ANSI network specifications.


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