T

Symbol

Parameter

Conditions

Min

Typ

Max

Units

t

H1

Propagation Delay from Disable Inputs

to Logical “1” Level (from High

14

22

ns

Impedance State)

t

H0

Propagation Delay from Disable Inputs

to Logical “0” Level (from High

18

27

ns

Impedance State)

Note 2: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. Except for “Operating Temperature Range” they

are not meant to imply that the devices should be operated at these limits. The table of “Electrical Characteristics” provides conditions for actual device operation.

Note 3: Unless otherwise specified min/max limits apply across the −55˚C to +125˚C temperature range for the DS7831 and across the 0˚C to +70˚C range for the

Note 4: All currents into device pins shown as positive, out of device pins as negative, all voltage referenced to ground unless otherwise noted. All values shown

as max or min on absolute value basis.

Mode of Operation

To operate as a quad single-ended line driver apply logical

“0”s to the output disable pins (to keep the outputs in the nor-

mal low impedance mode) and apply logical “0”s to both

Differential/Single-ended Mode Control inputs. All four chan-

nels will then operate independently and no signal inversion

will occur between inputs and outputs.

To operate as a dual differential line driver apply logical “0”s

to the Output Disable pins and apply at least one logical “1”

to the Differential/Single-ended Mode Control inputs.

The inputs to the A channels should be connected together

and the inputs to the B channels should be connected to-

gether.

In this mode the signals applied to the resulting inputs will

pass non-inverted on the A

the A

When operating in a bus-organized system with outputs tied

directly to outputs of other DS7831, DS8832’s (

Figure 1), all

devices except one must be placed in the “high impedance”

state. This is accomplished by ensuring that a logical “1” is

applied to at least one of the Output Disable pins of each de-

vice which is to be in the “high impedance” state. A NOR gate

was purposely chosen for this function since it is possible

with only two DM5442/DM7442, BCD-to-decimal decoders,

to decode as many as 100 DS7831, DS8832’s (

Figure 2).

The unique device whose Disable inputs receive two logical

“0” levels assumes the normal low impedance output state,

providing good capacitive drive capability and waveform in-

tegrity especially during the transition from the logical “0” to

logical ”1” state. The other outputs — in the high impedance

state — take only a small amount of leakage current from the

low impedance outputs. Since the logical “1” output current

from the selected device is 100 times that of a conventional

Series 54/74 device (40 mA vs. 400 µA), the output is easily

able to supply that leakage current for several hundred other

DS7831/DS8831’s, DS7832/DS8832’s and still have avail-

able drive for the bus line (

Figure 3).

DS005800-2

FIGURE 1.

www.national.com

4