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MB90867E Datasheet(PDF) 49 Page - Fujitsu Component Limited. |
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MB90867E Datasheet(HTML) 49 Page - Fujitsu Component Limited. |
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49 / 67 page  MB90860E Series 49 (5) Bus Timing (Read) (TA = −40 °C to +105 °C, VCC = 5.0 V ± 10%, VSS = 0.0 V, fCP ≤ 24 MHz) Parameter Sym- bol Pin Condition Value Unit Min Max ALE pulse width tLHLL ALE ⎯ tCP/2 − 10 ⎯ ns Valid address → ALE ↓ time tAVLL ALE, A23 to A16, AD15 to AD00 tCP/2 − 20 ⎯ ns ALE ↓ → Address valid time tLLAX ALE, AD15 to AD00 tCP/2 − 15 ⎯ ns Valid address → RD ↓ time tAVRL A23 to A16, AD15 to AD00, RD tCP − 15 ⎯ ns Valid address → Valid data input tAVDV A23 to A16, AD15 to AD00 ⎯ 5 tCP/2 − 60 ns RD pulse width tRLRH RD 3 tCP/2 − 20 ⎯ ns RD ↓ → Valid data input tRLDV RD, AD15 to AD00 ⎯ 3 tCP/2 − 50 ns RD ↑ → Data hold time tRHDX RD, AD15 to AD00 0 ⎯ ns RD ↓ → ALE ↑ time tRHLH RD, ALE tCP/2 − 15 ⎯ ns RD ↑ → Address valid time tRHAX RD, A23 to A16 tCP/2 − 10 ⎯ ns Valid address → CLK ↑ time tAVCH A23 to A16, AD15 to AD00, CLK tCP/2 − 16 ⎯ ns RD ↓ → CLK ↑ time tRLCH RD, CLK tCP/2 − 15 ⎯ ns ALE ↓ → RD ↓ time tLLRL ALE, RD tCP/2 − 15 ⎯ ns A23 to A16 0.8 V 2.4 V 2.4 V 0.8 V tRHAX AD15 to AD00 0.8 V 2.4 V 2.4 V 0.8 V Address VIL VIH VIH VIL Read data tRHDX tRLDV tAVDV CLK tAVCH 2.4 V tRLCH 2.4 V ALE 2.4 V tLHLL 2.4 V tRHLH 0.8 V tLLAX 2.4 V tAVLL RD tLLRL tRLRH 0.8 V 2.4 V tAVRL |
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