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HY57V56820B Datasheet(PDF) 6 Page - Hynix Semiconductor

Part No. HY57V56820B
Description  4 Banks x 8M x 8Bit Synchronous DRAM
Download  12 Pages
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Maker  HYNIX [Hynix Semiconductor]
Homepage  http://www.skhynix.com/kor/main.do
Logo HYNIX - Hynix Semiconductor

HY57V56820B Datasheet(HTML) 6 Page - Hynix Semiconductor

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HY57V56820B(L)T
Rev. 1.4/Mar. 02
6
DC CHARACTERISTICS II (TA=0 to 70°C, VDD=3.3±0.3V, VSS=0V)
Note :
1.IDD1 and IDD4 depend on output loading and cycle rates. Specified values are measured with the output open
2.Min. of tRRC (Refresh RAS cycle time) is shown at AC CHARACTERISTICS II
3.HY57V56820BT-6/H/8/P/S
4.HY57V56820BLT-6/H/8/P/S
Parameter
Symbol
Test Condition
Speed
Unit
Note
-6
-K
-H
-8
-P
-S
Operating Current
IDD1
Burst length=1, One bank active
tRC
≥ tRC(min), IOL=0mA
130
120
120
120
110
110
mA
1
Precharge Standby Current
in Power Down Mode
IDD2P
CKE
≤ VIL(max), tCK = 15ns
2
mA
IDD2PS
CKE
≤ VIL(max), tCK =
1
Precharge Standby Current
in Non Power Down Mode
IDD2N
CKE
≥ VIH(min), CS ≥ VIH(min), tCK = 15ns
Input signals are changed one time during
30ns. All other pins
≥ VDD-0.2V or ≤ 0.2V
30
mA
IDD2NS
CKE
≥ VIH(min), tCK =
Input signals are stable.
15
Active Standby Current
in Power Down Mode
IDD3P
CKE
≤ VIL(max), tCK = 15ns
5
mA
IDD3PS
CKE
≤ VIL(max), tCK =
5
Active Standby Current
in Non Power Down Mode
IDD3N
CKE
≥ VIH(min), CS ≥ VIH(min), tCK = 15ns
Input signals are changed one time during
30ns. All other pins
≥ VDD-0.2V or ≤ 0.2V
40
mA
IDD3NS
CKE
≥ VIH(min), tCK =
Input signals are stable.
30
Burst Mode Operating
Current
IDD4
tCK
≥ tCK(min), IOL=0mA
All banks active
CL=3
150
130
130
130
110
110
mA
1
CL=2
140
140
140
140
120
120
Auto Refresh Current
IDD5
tRRC
≥ tRRC(min), All banks active
240
220
220
200
200
200
mA
2
Self Refresh Current
IDD6
CKE
≤ 0.2V
3mA
3
1.5
mA
4


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