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DEVICE INFORMATION

GND

Bandgap

Bandgap

2.5 A

m

2.5 A

m

Current

Limit

Thermal

Shutdown

UVLO

Current

Limit

Thermal

Shutdown

UVLO

Enableand

Power

Control

Logic

60W

60W

OUT1

OUT2

EN1

EN2

IN

TPS719only

TPS719only

EN1

GND

GND

EN2

6

5

4

OUT1

IN

OUT2

1

2

3

TPS718xx

TPS719xx

SBVS088A – FEBRUARY 2007 – REVISED MARCH 2007

Figure 1. Functional Block Diagram

DRV PACKAGE

2mm

× 2mm SON

(TOP VIEW)

Table 1. PIN DESCRIPTIONS

TPS718xx, TPS719xx

NAME

NO.

DESCRIPTION

OUT1

1

Output of Regulator 1. A small ceramic capacitor (typically

≥ 1µF) is needed from this pin to ground to assure stability.

IN

2

Input supply to both regulators.

OUT2

3

Output of Regulator 2. A small ceramic capacitor (typically

≥ 1µF) is needed from this pin to ground to assure stability.

Enable pin for Regulator 2. Driving the Enable pin (EN2) high turns on Regulator 2. Driving this pin low puts Regulator 2

EN2

4

into shutdown mode, reducing operating current.

GND

5

Ground. Thermal pad should also be connected to ground.

Enable pin for Regulator 1. Driving the Enable pin (EN1) high turns on Regulator 1. Driving this pin low puts Regulator 1

EN1

6

into shutdown mode, reducing operating current.

4

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