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A6280 Datasheet(PDF) 4 Page - Allegro MicroSystems

Part No. A6280
Description  3 Bit Constant Current LED Driver with PWM Control
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Maker  ALLEGRO [Allegro MicroSystems]
Homepage  http://www.allegromicro.com
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A6280 Datasheet(HTML) 4 Page - Allegro MicroSystems

 
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3 Bit Constant Current LED Driver with PWM Control
A6280
4
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
OPERATING CHARACTERISTICS
, valid at TA = 25°C, VIN = 4.75 to 17.0 V, unless otherwise noted
Characteristic
Symbol
Test Conditions
Min.
Typ.
Max.
Units
ELECTRICAL CHARACTERISTICS
Quiescent Supply Current
IDD
fCLKIN = 0.0 Hz
5.0
mA
Operating Supply Current
IDD
fCLKIN = 5 Mhz
15.0
mA
Undervoltage Lockout
VIN(UV)
VIN rising
3.5
4.5
V
VIN falling
3.0
4.0
V
VREG Voltage Range
VREG
IO =15 mA, VIN = 17 V
4.6
5.4
V
VREG Dropout Voltage
VDO
IO =15 mA, VIN = 4.75 V
200
600
mV
Output Current (any single output)
IO
REXT = 5 kΩ, scalar = 100%
135
150.0
165
mA
REXT = 15 kΩ
44
54
mA
Output to Output Matching Error*
Err
Output to output variation—all outputs on, REXT= 5 kΩ
7–
7
%
Output Voltage Range
VDS(min)
1.0
3.0
V
Load Regulation
I%Diff / VDS
–±1
±3
%
Output Leakage Current
IDSX
VOH = 17 V
1.0
μA
Logic Input Voltage
VIH
2.0
V
VIL
0.8
V
Logic Input Voltage Hysteresis
All digital inputs
150
mV
Logic Input Current
IIN
VIN = 0 to 5 V
–20
20
μA
Logic Output Voltage
VOL
VIN ≥ 5.0 V, IO = ±2 mA
0.4
V
VOH
3.8
V
Input Resistance
RI
OEI pin, pull-up
150
300
600
LI pin, pull-down
100
200
400
Output Dot Correction Error
REXT = 5 kΩ; LSB
±1
bit
Thermal Shutdown Temperature
TJTSD Temperature increasing
165
°C
Thermal Shutdown Hysteresis
TJhys
–15–
°C
SWITCHING CHARACTERISTICS
Clock Hold Time
tH(CLK)
20
ns
Data Setup Time
tSU(D)
20
ns
Data Hold Time
tH(D)
20
ns
Latch Setup Time
tSU(LE)
20
ns
Latch Hold Time
tH(LE)
20
ns
Output Enable Set Up Time
tSU(OE)
40
ns
Output Enable Falling to Outputs Turning ON
Propagation Delay Time
tP(OE)2
200
ns
Clock to Output Propagation Delay Time
tP(OUT) VDS = 1.0 V, IO = 150 mA
200
ns
Logic Output Fall Time
tBF
COB = 50 pF, 4.5 to 0.5 V
50
100
ns
Logic Output Rise Time
tBR
COB = 50 pF, 0.5 to 4.5 V
30
60
ns
Output Fall Time (Turn Off)
tf
CO = 10 pF, 90% to 10% of IO = 10 mA
10
ns
CO = 10 pF, 90% to 10% of IO = 10 mA
10
ns
Output Rise Time (Turn On)
tr
CO = 10 pF, 90% to 10% of IO = 10 mA
50
ns
CO = 10 pF, 90% to 10% of IO = 10 mA
100
ns
Clock Falling Edge to Serial Data Out
Propagation Delay Time
tP(SDO)
50
100
ns
Output Enable In to Output Enable Out
Propagation Delay
tP(OE)
50
100
ns
Latch In to Latch Out Propagation Delay
tP(LE)
50
100
ns
Clock In to Clock Out Propagation Delay
tP(CLK)
50
100
ns
Clock Out Pulse Duration
tw(CLK)
70
100
130
ns
Maximum CLKIN Frequency
fCLKIN
6
MHz
*Err = [IO(min or max) – IO(av)] / IO(av).


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