6.42

IDT709189L

High-Speed 64K x 9 Synchronous Pipelined Dual-Port Static RAM

Industrial and Commercial Temperature Ranges

11

NOTES:

1. Transition is measured 0mV from Low or High-impedance voltage with the Output Test Load (Figure 2).

2. Output state (High, Low, or High-impedance is determined by the previous cycle control signals.

3.

4. Addresses do not have to be accessed sequentially since

5. "NOP" is "No Operation." Data in memory at the selected address may be corrupted and should be re-written to guarantee data integrity.

R/

W

ADDRESS

An

An +1

An + 2

An + 2

An + 3

An + 4

Dn + 2

CLK

4848 drw 13

Qn

Qn + 1

Qn + 3

READ

NOP

READ

(4)

(2)

(1)

(1)

WRITE

(5)

R/

W

ADDRESS

An

An +1

An + 2

An + 3

An + 4

An + 5

(4)

Dn + 2

CLK

4848 drw 14

Qn

Qn + 4

READ

WRITE

READ

(2)

Dn + 3

(1)

(1)

OE