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CX74063-3X Datasheet(PDF) 14 Page - Skyworks Solutions Inc. |
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CX74063-3X Datasheet(HTML) 14 Page - Skyworks Solutions Inc. |
14 / 62 page Data Sheet I CX74063-34/-35/-36 14 Skyworks Solutions, Inc., Proprietary and Confidential NOVEMBER 25, 2003 [781] 376-3000 I FAX [781] 376-3100 I SALES@SKYWORKSINC.COM I WWW.SKYWORKSINC.COM 103116C from baseband Coupler VCC2 Power Detector PAVAPC (pin 16) PDETVCC (pin 5) BBVAPC (pin 17) PDET (pin 12) Register 4 Rx/Tx Control Register (bit 21), PDETVCC TXENA (pin 2) PAC Delay Timer 5 pF 0 = 0.5 V 1 = 1.0 V PA 8 C1338a Bias Generator 10 k Ω + – 1 Figure 8. PA Controller Block Diagram Power Amplifier Gain Controller The device contains an error amplifier/integrator to provide transmit burst control for an external power amplifier (PA). As shown in Figure 8, when the device is connected to a PA, an RF detector, and a coupler, a loop is formed that controls the transmit power in a multi-band wireless application. The error amplifier amplifies and integrates the voltage difference between the RF detector output (PDET) and the power control input (BBVAPC). The output of the integrator is fed to an internal gain shaper that drives the gain control input (PAVAPC) of the external RF PA. The device. provides a bandgap voltage (PDETVCC) which can be used as the supply voltage for the external peak detector and can source up to 200 µA. The PA pre-bias is activated after a programmable delay and time-referenced from the rising edge of TXENA. The time delay is set using the serial interface. See Table 19 for details. Digital Interface The transceiver and synthesizer are controlled by a single three-wire serial interface. The transmitter, receiver, and synthesizer are each enabled through external inputs according to typical timing requirements as shown in Figures 10 and 11. Band selection for the CX74063-3x is through the three-wire serial interface. The PCO signal (pin 3) provides a band selection control output. DC offset calibration and front-end activation timing can also be controlled by an on-chip signal sequencer, precluding the need for separate control signals. All the logic and the three-wire interface inputs are referenced to the PCO signal (pin 3). The RX/TX Control Register is used to program the transceiver and to preset other test word states by setting bit 22 as a logic 1. If any test words are to be altered from their preset states, bit 22 must be sent to the RX/TX Control Register again as a logic 0. Typically, this is done only on power-up since the device has a zero-power standby mode that retains programmed test memory. There are eight additional registers used to program various functions of the CX74063-3x. The SX1 Control Register is used to program the fractional-N synthesizer and the SX2 Fractional-N Modulo Register is used to program the modulus. Four auxiliary registers are used to program the transceiver besides the RX/TX Control Register, and two 24-bit registers are used to program the synthesizer: • SX1 Synthesizer Control • SX2 Fractional-N Modulo • RX/TX Control • R0 Auxiliary Control • R2 DC Offset Timing • R3 IP2 Calibration • R4 PAC Timing Control • R6 VCXO Control • R7 VCXO Control SX1 Control Register. This register is used to program the fractional-N synthesizer, and set the values of the integral-N divider and the input-R divider. The polarity of the Phase/Frequency Detector (PFD) may also be defined by this register. Refer to Table 13. |
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