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TAS5036B Datasheet(PDF) 23 Page - Texas Instruments |
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TAS5036B Datasheet(HTML) 23 Page - Texas Instruments |
23 / 56 page Architecture Overview 17 SLES073—February 2003 TAS5036B 2.2.4 Error Status Register The error status register indicates historical information on control signal changes and clock errors. This register latches these indications when they occur. The indications are cleared by writing a 00(Hex) to the register. This register is intended as a diagnostic tool to be used only when the system is not operating correctly. This is because the error status bits are set when the data rate, serial data interface format, or master/slave mode is changed. As a result, this register indicates an error condition even though the system is operating normally. This register should only be used while diagnosing transient error conditions. Any clock error or control signal terminal change which occurs since the last time the error status register was cleared is displayed. In using this register, the first step is to initialize the device and verify that all of the clock signals are active. Then this register should be cleared by writing a 00(Hex). At this point, the register indicates any errors or control signal changes. This register indicates an error condition by a high for the following conditions: • FS ERROR • A control terminal change has occurred (M_S, DBLSPD) • LRCLK error • MCLK_IN count error • DCLK phase error with respect to MCLK_IN • MCLK_IN phase error with respect to DCLK • PWM timing error If all bits of the register are low, no errors have occurred and no control terminals changed. There is no one-to-one correspondence of clock error indication to a system error condition. A particular system error can be indicated by one or more error indications in this register. The system error conditions and the reported errors are as follows: There is no correct number of MCLKs per LRCLK: • FS error has occurred or • LRCLK error or • MCLK_IN count error LRCLK is absent: • LRCLK error MCLK is the wrong frequency, changing frequency, or absent: • DCLK phase error with respect to MCLK • MCLK phase error with respect to DCLK • PWM timing error SCLK is the wrong frequency or absent • SCLK error |
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