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DJLXT971ALCA4 Datasheet(PDF) 58 Page - Intel Corporation

Part # DJLXT971ALCA4
Description  3.3V Dual-Speed Fast Ethernet PHY Transceiver
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Manufacturer  INTEL [Intel Corporation]
Direct Link  http://www.intel.com
Logo INTEL - Intel Corporation

DJLXT971ALCA4 Datasheet(HTML) 58 Page - Intel Corporation

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LXT971A 3.3V Dual-Speed Fast Ethernet Transceiver
58
Datasheet
Document #: 249414
Revision #: 002
Rev. Date: August 7, 2002
Table 22. I/O Characteristics - LED/CFG Pins
Parameter
Symbol
Min
Typ
Max
Units
Test Conditions
Input Low Voltage
VIL
0.8
V
Input High Voltage
VIH
2.0
V
Input Current
II
-10
10
µA0 < VI < VCCIO
Output Low Voltage
VOL
0.4
V
IOL = 10 mA
Output High Voltage
VOH
2.0
V
IOH = -10 mA
Table 23. I/O Characteristics – SD/TP Pin
Parameter
Sym
Min
Typ1
Max
Units
Test Conditions
Reset and Power-Up States – FX/TP Mode Configuration
Fiber Mode (Register bit 16.0 = 1)
VFX
600
1600-2400
mV
Twisted-Pair Mode (Register bit 16.0 = 0)
VTP
GND
500
mV
100BASE-FX Mode Normal Operation – SD Input from Fiber Transceiver
Input Low Voltage
VIL
1.49
1.6
1.83
V
VCCD = 3.3 V
Input High Voltage
VIH
2.14
2.4
2.42
V
VCCD = 3.3 V
1. Typical values are for design aid only; not guaranteed and not subject to production testing.
Table 24. 100BASE-TX Transceiver Characteristics
Parameter
Symbol
Min
Typ1
Max
Units
Test Conditions
Peak differential output voltage
VP
0.95
1.05
V
Note 2
Signal amplitude symmetry
Vss
98
102
%
Note 2
Signal rise/fall time
TRF
3.0
5.0
ns
Note 2
Rise/fall time symmetry
TRFS
0.5
ns
Note 2
Duty cycle distortion
DCD
35
50
65
%
Offset from 16 ns pulse
width at 50% of pulse
peak
Overshoot/Undershoot
VOS
––
5
%
Jitter (measured differentially)
1.4
ns
1. Typical values are at 25 °C and are for design aid only; not guaranteed and not subject to production
testing.
2. Measured at the line side of the transformer, line replaced by 100
Ω(+/-1%) resistor.


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