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A8290 Datasheet(PDF) 6 Page - Allegro MicroSystems

Part No. A8290
Description  Single LNB Supply and Control Voltage Regulator
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Maker  ALLEGRO [Allegro MicroSystems]
Homepage  http://www.allegromicro.com
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A8290 Datasheet(HTML) 6 Page - Allegro MicroSystems

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Single LNB Supply and Control Voltage Regulator
A8290
6
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
I2C™-Compatible Interface (continued)
SCL Low Time
tLOW
1.3
μs
SCL High Time
tHIGH
0.6
μs
Data Setup Time
tSU:DAT
100
ns
Data Hold Time
tHD:DAT
For tHD:DAT(min), the master device must
provide a hold time of at least 300 ns for the
SDA signal in order to bridge the undefined
region of the SCL signal falling edge
0
900
ns
Setup Time for Stop Condition
tSU:STO
0.6
μs
I2C™ Address Setting
ADD Voltage for Address 0001,000
Address1
0
0.7
V
ADD Voltage for Address 0001,001
Address2
1.3
1.7
V
ADD Voltage for Address 0001,010
Address3
2.3
2.7
V
ADD Voltage for Address 0001,011
Address4
3.3
5.0
V
1Operation at 16 V may be limited by power loss in the linear regulator.
2Guaranteed by worst case process simulations and system characterization. Not production tested.
3LNB output ripple and noise are dependent on component selection and PCB layout. Refer to the Application Schematic and PCB layout
recommendations. Not production tested.
4Current from the LNB output may be limited by the choice of Boost components.
ELECTRICAL CHARACTERISTICS (continued) at T
A = 25°C, VIN = 8 to 16 V, unless noted otherwise
1
Characteristics
Symbol
Test Conditions
Min.
Typ.
Max.
Units
I2C™ Interface Timing Diagram
tSU:STA
tHD:STA
tSU:DAT
tHD:DAT
tBUF
tSU:STO
tHIGH
tLOW
SDA
SCL


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