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MAX3786 Datasheet(PDF) 5 Page - Maxim Integrated Products

Part No. MAX3786
Description  1.5Gbps Serial ATA-Compatible Mux/Buffer with Loopback and Equalization
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Maker  MAXIM [Maxim Integrated Products]
Homepage  http://www.maxim-ic.com
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MAX3786 Datasheet(HTML) 5 Page - Maxim Integrated Products

 
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Detailed Description
The MAX3786 consists of three multiplexers, I/O buffers,
and LOS-detection circuitry (see the Functional Diagram).
The buffers on the controller side provide EQ on the
inputs and PE on the outputs.
Mux/Buffer Logic
By means of the LVCMOS input SEL, a SATA-compati-
ble device at TX/RX can be connected to either
IN0/OUT0 or IN1/OUT1. When SEL is low, TX/RX are
connected to IN0/OUT0, and when SEL is high, TX/RX
are connected to IN1/OUT1. Use of the SEL input pro-
vides the ability to operate a single SATA disk drive
from redundant controllers. Loopback is provided on
the IN_/OUT_ side and is controlled by the LVCMOS
input LB_EN. When LB_EN is low, the nonselected
IN_/OUT_ loops back (see Table 1). The SEL and
LB_EN control lines are internally pulled high through
40k
Ω resistors (see the Functional Diagram).
Loss-of-Signal Logic
At each high-speed input to the MAX3786, an LOS cir-
cuit is provided. In this circuit, a differential signal of
50mVP-P or less is detected as OFF, and a signal of
greater than 150mVP-P is detected as ON. The LOS
detectors, in combination with the select logic, control
their associated high-speed output-disable circuits, so
1.5Gbps Serial ATA-Compatible Mux/Buffer with
Loopback and Equalization
_______________________________________________________________________________________
5
Pin Description
PIN
NAME
FUNCTION
1, 4, 8, 15,
17, 20, 21,
24, 26, 30
VCC
+3.3V Supply Voltage
2
TX+
Positive TX Data Output, CML. Serial ATA compatible.
3
TX-
Negative TX Data Output, CML. Serial ATA compatible.
5
SEL
Multiplex Select Control Input, LVCMOS. Set high to connect RX/TX to OUT1/IN1.
6
RX-
Negative RX Data Input, CML. Serial ATA compatible.
7
RX+
Positive RX Data Input, CML. Serial ATA compatible.
9
PE1EN
Channel 1 Preemphasis Enable Input, LVCMOS. Set low to enable OUT1 PE.
10
EQ1EN
Channel 1 Equalization Enable Input, LVCMOS. Set low to enable IN1 EQ.
11
LB_EN
Loopback Enable Input, LVCMOS. Set low to loopback data on nonselected channel.
12
CM1
Input 1 Common-Mode Point. Normally not connected; can be connected to VCC through 1.0µF
capacitor. See Figure 1.
13
IN1-
Negative Channel 1 Data Input, CML. Serial ATA compatible.
14
IN1+
Positive Channel 1 Data Input, CML. Serial ATA compatible.
16, 25
GND
Supply Ground
18
OUT1-
Negative Channel 1 Data Output, CML. Serial ATA compatible.
19
OUT1+
Positive Channel 1 Data Output, CML. Serial ATA compatible.
22
OUT0-
Negative Channel 0 Data Output, CML. Serial ATA compatible.
23
OUT0+
Positive Channel 0 Data Output, CML. Serial ATA compatible.
27
IN0-
Negative Channel 0 Data Input, CML. Serial ATA compatible.
28
IN0+
Positive Channel 0 Data Input, CML. Serial ATA compatible.
29
CM0
Input 0 Common-Mode Point. Normally not connected; can be connected to VCC through 1.0µF
capacitor. See Figure 1.
31
EQ0EN
Channel 0 Equalization Enable Input, LVCMOS. Set low to enable IN0 EQ.
32
PE0EN
Channel 0 Preemphasis Enable Input, LVCMOS. Set low to enable OUT0 PE.
EP
Exposed
pad
Ground. The exposed pad must be soldered to the circuit board ground for proper thermal and
electrical performance.


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