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LTC1705 Datasheet(PDF) 19 Page - Linear Technology

Part # LTC1705
Description  Dual 550kHz Synchronous Switching Regulator Controller with 5-Bit VID and 150mA LDO
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC1705 Datasheet(HTML) 19 Page - Linear Technology

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LTC1705
19
APPLICATIO S I FOR ATIO
gain falls to 0dB. The simplest strategy is to set up the
feedback amplifier as an inverting integrator, with the 0dB
frequency lower than the LC pole (Figure 6). This “Type 1”
configuration is stable but transient response is less than
exceptional if the LC pole is at a low frequency.
Figure 7 shows an improved “Type 2” circuit that uses an
additional pole-zero pair to temporarily remove 90
° of
phase shift. This allows the loop to remain stable with 90
°
more phase shift in the LC section, provided the loop
reaches 0dB gain near the center of the phase “bump.”
Type 2 loops work well in systems where the ESR zero in
the LC roll-off happens close to the LC pole, limiting the
total phase shift due to the LC. The additional phase
compensation in the feedback amplifier allows the 0dB
point to be at or above the LC pole frequency, improving
loop bandwidth substantially over a simple Type 1 loop. It
has limited ability to compensate for LC combinations
where low capacitor ESR keeps the phase shift near 180
°
for an extended frequency range. LTC1705 circuits using
conventional switching grade electrolytic output capaci-
tors can often get acceptable phase margin with Type 2
compensation.
1705 F07
0
PHASE
–6dB/OCT
–6dB/OCT
GAIN
FREQ
–90
–180
–270
–360
RB
VREF
R1
R2
FB
C2
IN
OUT
+
C1
1705 F08
0
PHASE
–6dB/OCT
+6dB/OCT
–6dB/OCT
GAIN
FREQ
–90
–180
–270
–360
RB
VREF
R1
R2
FB
C2
IN
OUT
+
C1
C3
R3
1705 F06
0
PHASE
–6dB/OCT
GAIN
FREQ
–90
–180
–270
–360
RB
R1
FB
C1
IN
OUT
+
VREF
Figure 6. Type 1 Schematic and Transfer Function
Figure 7. Type 2 Schematic and Transfer Function
Figure 8. Type 3 Schematic and Transfer Function
“Type 3” loops (Figure 8) use two poles and two zeros to
obtain a 180
° phase boost in the middle of the frequency
band. A properly designed Type 3 circuit can maintain
acceptable loop stability even when low output capacitor
ESR causes the LC section to approach 180
° phase shift
well above the initial LC roll-off. As with a Type 2 circuit,
the loop should cross through 0dB in the middle of the
phase bump to maximize phase margin. Many LTC1705
circuits using low ESR tantalum or OS-CON output capaci-
tors need Type 3 compensation to obtain acceptable phase
margin with a high bandwidth feedback loop.
Feedback Component Selection
Selecting the R and C values for a typical Type 2 or Type 3
loop is a nontrivial task. The applications shown in this
data sheet show typical values, optimized for the power
components shown. They should give acceptable perfor-
mance with similar power components, but can be way off
if even one major power component is changed signifi-
cantly. Applications that require optimized transient re-
sponse will need to recalculate the compensation values
specifically for the circuit in question. The underlying
mathematics are complex, but the component values can
be calculated in a straightforward manner if we know the
gain and phase of the modulator at the crossover fre-
quency.
Modulator gain and phase can be measured directly from
a breadboard or can be simulated if the appropriate
parasitic values are known. Measurement will give more
accurate results, but simulation can often get close enough
to give a working system. To measure the modulator gain
and phase directly, wire up a breadboard with an LTC1705


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