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MC54HC02A Datasheet(PDF) 1 Page - Motorola, Inc |
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MC54HC02A Datasheet(HTML) 1 Page - Motorola, Inc |
1 / 7 page ![]() MOTOROLA SEMICONDUCTOR TECHNICAL DATA 3–1 REV 7 © Motorola, Inc. 1995 10/95 Quad 2-Input NOR Gate High–Performance Silicon–Gate CMOS The MC54/74HC02A is identical in pinout to the LS02. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. • Output Drive Capability: 10 LSTTL Loads • Outputs Directly Interface to CMOS, NMOS, and TTL • Operating Voltage Range: 2.0 to 6.0 V • Low Input Current: 1.0 µA • High Noise Immunity Characteristic of CMOS Devices • In Compliance with the Requirements Defined by JEDEC Standard No. 7A • Chip Complexity: 40 FETs or 10 Equivalent Gates LOGIC DIAGRAM 1 Y1 2 A1 PIN 14 = VCC PIN 7 = GND 3 B1 Y4 Y = A + B 4 Y2 5 A2 6 B2 10 Y3 8 A3 9 B3 13 11 A4 12 B4 MC54/74HC02A FUNCTION TABLE PIN ASSIGNMENT 11 12 13 14 8 9 10 5 4 3 2 1 7 6 Y3 A4 B4 Y4 VCC A3 B3 Y2 B1 A1 Y1 GND B2 A2 A L L H H Inputs Output B L H L H Y H L L L D SUFFIX SOIC PACKAGE CASE 751A–03 N SUFFIX PLASTIC PACKAGE CASE 646–06 ORDERING INFORMATION MC54HCXXAJ MC74HCXXAN MC74HCXXAD MC74HCXXADT Ceramic Plastic SOIC TSSOP 1 14 1 14 1 14 DT SUFFIX TSSOP PACKAGE CASE 948G–01 J SUFFIX CERAMIC PACKAGE CASE 632–08 1 14 |