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MC54HC02A Datasheet(PDF) 3 Page - Motorola, Inc

Part No. MC54HC02A
Description  QUAD 2-INPUT NOR GATE HIGH-PERFORMANCE SILICON-GATE CMOS
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Maker  MOTOROLA [Motorola, Inc]
Homepage  http://www.freescale.com
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MC54HC02A Datasheet(HTML) 3 Page - Motorola, Inc

   
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MC54/74HC02A
High–Speed CMOS Logic Data
DL129 — Rev 6
3–3
MOTOROLA
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
Guaranteed Limit
Unit
v125°C
v85_C
– 55 to
25
_C
VCC
V
Test Conditions
Parameter
Symbol
VOL
Maximum Low–Level Output
Voltage
Vin = VIH or VIL
|Iout| v 20 µA
2.0
4.5
6.0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
V
Vin = VIH or VIL |Iout| v 2.4 mA
|Iout| v 4.0 mA
|Iout| v 5.2 mA
3.0
4.5
6.0
0.26
0.26
0.26
0.33
0.33
0.33
0.4
0.4
0.4
Iin
Maximum Input Leakage Current
Vin = VCC or GND
6.0
± 0.1
± 1.0
± 1.0
µA
ICC
Maximum Quiescent Supply
Current (per Package)
Vin = VCC or GND
|Iout| = 0 µA
6.0
1.0
10
40
µA
NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6.0 ns)
Guaranteed Limit
Symbol
Parameter
VCC
V
– 55 to
25
_C
v85_C
v125_C
Unit
tPLH,
tPHL
Maximum Propagation Delay, Input A or B to Output Y
(Figures 1 and 2)
2.0
3.0
4.5
6.0
75
30
15
13
95
40
19
16
110
55
22
19
ns
tTLH,
tTHL
Maximum Output Transition Time, Any Output
(Figures 1 and 2)
2.0
3.0
4.5
6.0
75
30
15
13
95
40
19
16
110
55
22
19
ns
Cin
Maximum Input Capacitance
10
10
10
pF
NOTE: For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the Motorola High–
Speed CMOS Data Book (DL129/D).
CPD
Power Dissipation Capacitance (Per Gate)*
Typical @ 25
°C, VCC = 5.0 V
pF
CPD
Power Dissipation Capacitance (Per Gate)*
22
pF
* Used to determine the no–load dynamic power consumption: PD = CPD VCC2f + ICC VCC. For load considerations, see Chapter 2 of the
Motorola High–Speed CMOS Data Book (DL129/D).


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