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ADS5546IRGZTG4 Datasheet(PDF) 34 Page - Texas Instruments

Part # ADS5546IRGZTG4
Description  14-BIT, 190 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
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ADS5546IRGZTG4 Datasheet(HTML) 34 Page - Texas Instruments

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S0165-01
VCM
REFM
REFP
INTREF
INTREF
EXTREF
Internal
Reference
ADS5546
Internal Reference
External Reference
Full−scale differential input pp + (Voltage forced on VCM)
1.33
(2)
Low Sampling Frequency Operation
ADS5546
SLWS183C – NOVEMBER 2005 – REVISED OCTOBER 2006
APPLICATION INFORMATION (continued)
Figure 47. Reference Section
When the device is in internal reference mode, the REFP and REFM voltages are generated internally.
Common-mode voltage (1.5 V nominal) is output on VCM pin, which can be used to externally bias the analog
input pins.
When the device is in external reference mode, the VCM acts as a reference input pin. The voltage forced on
the VCM pin is buffered and gained by 1.33 internally, generating the REFP and REFM voltages. The differential
input voltage corresponding to full-scale is given by Equation 2.
In this mode, the 1.5 V common-mode voltage to bias the input pins has to be generated externally. There is no
change in performance compared to internal reference mode.
For best performance at high sampling frequencies, ADS5546 uses a clock generator circuit to derive internal
timing for the ADC. The clock generator operates from 190 MSPS down to 50 MSPS in the DEFAULT SPEED
mode. The ADC enters this mode after applying reset (with serial interface configuration) or by tying SCLK pin to
low (with parallel configuration).
For low sampling frequencies (below 50 MSPS), the ADC must be put in the LOW SPEED mode. This mode
can be entered by:
setting the register bit <LOW SPEED> through the serial interface, OR
tying the SCLK pin to high (see Table 3) using the parallel configuration.
34
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