ADS5546IRGZRG4 datasheet(12/50 Pages) TI

Part #	ADS5546IRGZRG4

Description	14-BIT, 190 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS

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Manufacturer	TI [Texas Instruments]

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(1/3) AVDD

ToParallelPin

R

AVDD

GND

R

(2/3) AVDD

ADS5546

SLWS183C – NOVEMBER 2005 – REVISED OCTOBER 2006

Table 2. Priority Between Parallel Pins and Serial Registers

FUNCTIONS SUPPORTED

PRIORITY

When using the serial interface, bit <REF> (register 0x6D, bit D4) controls this mode, ONLY

MODE

Internal/External reference

if the MODE pin is tied low.

When using the serial interface, bit <DF> (register 0x63, bit D3) controls this mode, ONLY if

DATA FORMAT

the DFS pin is tied low.

DFS

When using the serial interface, bit <ODI> (register 0x6C, bits D3-D4) controls LVDS/CMOS

LVDS/CMOS

selection independent of the state of DFS pin

Figure 4. Simple Scheme to Configure Parallel Pins

12

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