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BQ2083-V1P2 Datasheet(PDF) 6 Page - Texas Instruments

Part No. BQ2083-V1P2
Description  SBS-COMPLIANT GAS GAUGE IC FOR USE WITH THE bp29311
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Maker  TI [Texas Instruments]
Homepage  http://www.ti.com
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BQ2083-V1P2 Datasheet(HTML) 6 Page - Texas Instruments

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bq2083-V1P2
SLUS573 − JULY 2003
www.ti.com
6
SMBUS TIMING SPECIFICATIONS
VDD = 3.0 V to 3.6 V, TA = −20°C to 85°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
fSMB
SMBus operating frequency
Slave mode, SMBC 50% duty cycle
10
100
kHz
fMAS
SMBus master clock frequency
Master mode, no clock low slave extend
51.2
kHz
tBUF
Bus free time between start and stop
4.7
µs
thd(STA)
Hold time after (repeated) start
4.0
µs
tsu(STA)
Repeated start setup time
4.7
µs
tsu(STO)
Stop setup time
4.0
µs
thd(DAT)
Data hold time
Receive mode
0
ns
thd(DAT)
Data hold time
Transmit mode
300
ns
tsu(DAT)
Data setup time
250
ns
tTIMEOUT
Error signal/detect
See Note 1
25
35
ms
tlow
Clock low period
4.7
µs
thigh
Clock high period
See Note 2
4.0
50
µs
tlow(SEXT)
Cumulative clock low slave extend time
See Note 3
25
ms
tlow(MEXT)
Cumulative clock low master extend time
See Note 4
10
ms
tf
Clock/data fall time
See Note 5
300
ns
tr
Clock/data rise time
See Note 6
1000
ns
(1) The bq2083−V1P2 times out when any clock low exceeds tTIMEOUT
(2) thigh Max. is minimum bus idle time. SMBC = 1 for t > 50 µs causes reset of any transaction involving bq2083−V1P2 that is in progress.
(3) tlow(SEXT) is the cumulative time a slave device is allowed to extend the clock cycles in one message from initial start to the stop.
(4) tlow(MEXT) is the cumulative time a master device is allowed to extend the clock cycles in one message from initial start to the stop.
(5) Rise time tr = (VILMAX − 0.15 V) to (VIHMIN + 0.15 V).
(6) Fall time tf = 0.9 VDD to (VILMAX − 0.15 V).
DATA FLASH MEMORY SWITCHING CHARACTERISTICS
VDD = 3.0 V to 3.6 V, TA = −20°C to 85°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
t(RETENSION)
Data retention
See Note 1
10
Years
Flash programming write-cycles
See Note 1
105
Cycles
t(WORDPROG)
Word programming time
See Note 1
2
ms
I(DDPROG)
Flash-write supply current
See Note 1
14
16
mA
(1) Specified by design. Not production tested.
Register Backup
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
I(RBI)
RBI data-retention input current (see Note 1)
VRB > 3.0 V, VDD < VIT
10
100
nA
V(RBI)
RBI data-retention voltage
1.3
V
(1) Specified by design. Not production tested.


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