Memory Management Unit
6-18
Copyright © ARM Limited 1997, 1998, 2000. All rights reserved.
ARM DDI 0192A
6.11 MMU faults and CPU aborts
The MMU generates four types of faults:
•
alignment fault
•
translation fault
•
domain fault
•
permission fault.
In addition, an external abort can be raised on external data access.
The access control mechanisms of the MMU detect the conditions that produce these
faults. If a fault is detected as the result of a memory access, the MMU aborts the access
and signals the fault condition to the CPU. The MMU is also capable of retaining status
and address information about the abort. The CPU recognizes two types of abort that
are treated differently by the MMU:
•
Data Aborts
•
Prefetch Aborts.
If the MMU detects an access violation, it does so before the external memory access
takes place, and it therefore inhibits the access. External aborts do not necessarily
inhibit the external access, as described in External aborts on page 6-25.
If the ARM720T is operating in fastbus mode an internally aborting access can cause
the address on the external address bus to change, even though the external bus cycle
has been canceled. The address that is placed on the bus is the translation of the address
that caused the abort, though in the case of a translation fault the value of this address
is undefined. No memory access is performed to this address.
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
