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MB90F362 Datasheet(PDF) 2 Page - Fujitsu Component Limited.

Part No. MB90F362
Description  16-bit Proprietary Microcontroller
Download  59 Pages
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Maker  FUJITSU [Fujitsu Component Limited.]
Homepage  http://edevice.fujitsu.com/fmd/en/index.html
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MB90F362 Datasheet(HTML) 2 Page - Fujitsu Component Limited.

 
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MB90360 Series
2
■ FEATURES
• Clock
• Built-in PLL clock frequency multiplication circuit
• Selection of machine clocks (PLL clocks) is allowed among frequency division by 2 on oscillation clock and
multiplication of 1 to 6 times of oscillation clock (for 4 MHz oscillation clock, 4 MHz to 24 MHz) .
• Operation by sub-clock (up to 50 kHz : 100 kHz oscillation clock divided two) is allowed (devices without S-
suffix only) .
• Minimum execution time of instruction : 42 ns (when operating with 4-MHz oscillation clock and 6-time multiplied
PLL clock) .
• Clock monitor function (MB90x367x only)
• Main clock or sub-clock is monitored independently
• Internal CR oscillation clock (100 kHz typical) can be used as sub-clock
• Instruction system best suited to controller
• 16 Mbytes CPU memory space
• 24-bit internal addressing
• Wide choice of data types (bit, byte, word, and long word)
• Wide choice of addressing modes (23 types)
• Enhanced multiply-divide instructions with sign and RETI instructions
• Enhanced high-precision computing with 32-bit accumulator
• Instruction system compatible with high-level language (C language) and multitask
• Employing system stack pointer
• Enhanced various pointer indirect instructions
• Barrel shift instructions
• Increased processing speed
• 4-byte instruction queue
• Powerful interrupt function
• Powerful 8-level, 34-condition interrupt feature
• Up to 8 channel external interrupts are supported
• Automatic data transfer function independent of CPU
• Expanded intelligent I/O service function (EI2OS) : up to 16 channels
• Low-power consumption (standby) mode
• Sleep mode (a mode that halts CPU operating clock)
• Main timer mode (timebase timer mode that is transferred from main clock mode)
• PLL timer mode (timebase timer mode that is transferred from PLL clock mode)
• Watch mode (a mode that operates sub-clock and watch timer only, devices without S-suffix)
• Stop mode (a mode that stops oscillation clock and sub-clock)
• CPU blocking operation mode
• Process
•CMOS technology
• I/O port
• General-purpose input/output port (CMOS output)
- 34 ports (devices without S-suffix)
- 36 ports (devices with S-suffix)
• Sub-clock pin (X0A and X1A)
• Provided (used for external oscillation), devices without S-suffix
• Not provided (used with internal CR oscillation in sub-clock mode) , devices with S-suffix
(Continued)


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