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KM641001B Datasheet(PDF) 5 Page - Samsung semiconductor |
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KM641001B Datasheet(HTML) 5 Page - Samsung semiconductor |
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5 / 9 page 
KM641001B/BL CMOS SRAM PRELIMINARY Rev. 3.0 - 5 - July 1998 WRITE CYCLE Parameter Symbol KM641001B/BL-15 KM641001B/BL-20 Unit Min Max Min Max Write Cycle Time tWC 15 - 20 - ns Chip Select to End of Write tCW 10 - 12 - ns Address Set-up Time tAS 0 - 0 - ns Address Valid to End of Write tAW 10 - 12 - ns Write Pulse Width(OE High) tWP 10 - 12 - ns Write Pulse Width(OE Low) tWP1 15 - 20 - ns Write Recovery Time tWR 0 - 0 - ns Write to Output High-Z tWHZ 0 8 0 10 ns Data to Write Time Overlap tDW 7 - 9 - ns Data Hold from Write Time tDH 0 - 0 - ns End Write to Output Low-Z tOW 3 - 3 - ns Address Data Out Previous Valid Data Valid Data TIMMING DIAGRAMS TIMING WAVEFORM OF READ CYCLE(1) (Address Controlled, CS=OE=VIL, WE=VIH) tAA tRC tOH TIMING WAVEFORM OF READ CYCLE(2) (WE=VIH) CS Address OE Data out tAA tOLZ tLZ(4,5) tOH tRC tOE tCO tPU tPD tHZ(3,4,5) 50% 50% VCC Current ICC ISB Valid Data tOHZ |
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