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NE56632-XX Datasheet(PDF) 4 Page - NXP Semiconductors

Part No. NE56632-XX
Description  Active-LOW system reset with adjustable delay time
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Maker  PHILIPS [NXP Semiconductors]
Homepage  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

NE56632-XX Datasheet(HTML) 4 Page - NXP Semiconductors

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Philips Semiconductors
Product data
NE56632-XX
Active-LOW system reset with adjustable delay time
2002 Mar 25
4
ELECTRICAL CHARACTERISTICS
Tamb = 25 °C, unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
-XX
MIN.
TYP.
MAX.
UNIT
VS
Detection threshold
VCC = HIGH-to-LOW; RL = 4.7 kΩ; S1=ON;
V
≤ 04 V
46
4.531
4.600
4.669
V
VOL ≤ 0.4 V;
Test Circuit 1 (Figure 27)
45
4.432
4.500
4.568
V
Test Circuit 1 (Figure 27)
44
4.334
4.400
4.466
V
43
4.235
4.300
4.365
V
42
4.137
4.200
4.263
V
31
3.053
3.100
3.147
V
30
2.955
3.000
3.045
V
29
2.856
2.900
2.944
V
28
2.758
2.800
2.842
V
27
2.659
2.700
2.741
V
20
1.970
2.000
2.030
V
19
1.871
1.900
1.929
V
Vhys
Hysteresis voltage
RL = 4.7 kΩ; VCC = LOW-to-HIGH-to-LOW; S1 = ON; Test
Circuit 1 (Figure 27)
25
50
100
mV
VS/∆T
Detection threshold voltage
temperature coefficient
RL = 4.7 kΩ; Tamb = –20 °C to +75 °C; S1 = ON;
Test Circuit 1 (Figure 27)
±0.01
%/
°C
VOL
LOW-level output voltage
VCC1 = VS(min) – 0.05 V; RL = 4.7 kΩ; S1 = ON;
Test Circuit 1 (Figure 27)
0.2
0.4
V
ILO
Output leakage current
VCC1 = VCC2 = 10 V; S2 = ON; Test Circuit 1 (Figure 27)
±0.1
µA
ICCL
Supply current (ON time)
VCC1 = VS(min) – 0.05 V; RL = ∞; Test Circuit 1 (Figure 27)
5.0
9.0
µA
ICCH
Supply current (OFF time)
VCC1 = VS(typ)/0.85; RL = ∞; Test Circuit 1 (Figure 27)
3.0
5.0
µA
tPLH
LOW-to-HIGH delay time
CL = 100 pF; RL = 4.7 kΩ; CD = 10 nF (Note 1)
(Note 3)
ms
tPHL
HIGH-to-LOW delay time
CL = 100 pF; RL = 4.7 kΩ; CD = 10 nF (Note 2)
(Note 3)
µs
VOPL
Minimum operating
threshold voltage
RL = 4.7 kΩ; VOL ≤ 0.4 V; S1 = ON;
Test Circuit 1 (Figure 27)
0.65
0.80
V
IOL1
Output current (ON Time 1)
VO = 0.4 V; RL = 0; VCC1 = VS(min) – 0.05 V;
VCC2 = 0.4 V; S2 = ON; Test Circuit 1 (Figure 27)
5
mA
IOL2
Output current (ON Time 2)
VO = 0.4 V; RL = 0; VCC1 = VS(min) – 0.05 V;
Tamb = –20 °C to +75 °C; S2 = ON;
Test Circuit 1 (Figure 27)
3
mA
NOTES:
1. tPLH:VCC = (VS(typ) – 0.4 V) to (VS(typ) + 0.4 V); tPLH is release delay time (Test Circuit 2, Figure 28).
2. tPHL:VCC = (VS(typ) + 0.4 V) to (VS(typ) – 0.4 V); tPHL is assertion delay time (Test Circuit 2, Figure 28).
3. See Table 1.
Table 1. NE56632-XX series typical delay time
–XX
tPLH
tPHL
46
195 ms
140
µs
45
190 ms
140
µs
44
185 ms
140
µs
43
180 ms
140
µs
42
175 ms
140
µs
31
120 ms
120
µs
30
115 ms
120
µs
29
110 ms
120
µs
28
105 ms
100
µs
27
100 ms
100
µs
20
65 ms
100
µs
19
60 ms
100
µs


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