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IDT74FCT16952AT Datasheet(PDF) 2 Page - Integrated Device Technology

Part No. IDT74FCT16952AT
Description  FAST CMOS 16-BIT REGISTERED TRANSCEIVER
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

IDT74FCT16952AT Datasheet(HTML) 2 Page - Integrated Device Technology

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INDUSTRIALTEMPERATURERANGE
IDT74FCT16925AT/CT/ET
FASTCMOS16-BITREGISTEREDTRANSCEIVER
PIN CONFIGURATION
Symbol
Description
Max
Unit
VTERM(2) Terminal Voltage with Respect to GND
–0.5 to +7
V
VTERM(3) Terminal Voltage with Respect to GND
–0.5 to VCC+0.5
V
TSTG
Storage Temperature
–65 to +150
°C
IOUT
DC Output Current
–60 to +120
mA
ABSOLUTE MAXIMUM RATINGS(1)
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. All device terminals except FCT162XXX Output and I/O terminals.
3. Output and I/O terminals for FCT162XXX.
Symbol
Parameter(1)
Conditions
Typ.
Max.
Unit
CIN
Input Capacitance
VIN = 0V
3.5
6
pF
COUT
Output Capacitance
VOUT = 0V
3.5
8
pF
CAPACITANCE (TA= +25°C, F = 1.0MHz)
NOTE:
1. This parameter is measured at characterization but not tested.
SSOP/ TSSOP
TOP VIEW
1
B 1
1
B 2
GN D
1
B 3
1
B 4
VCC
1
B 5
1
B 6
1
OEBA
1
B 7
1
B 8
2
B 1
2
B 2
GN D
2
B 3
2
B 4
VCC
2
B 5
GN D
1
CLKBA
2
B 7
2
B 6
2
B 8
GN D
2
CLKBA
2
OEBA
1
CLKAB
GND
1
A 1
1
A 2
VCC
1
A 3
1
A 4
GND
1
A 5
1
A 6
1
A 7
1
A 8
GND
2
A 1
2
A 2
VCC
2
A 3
2
A 5
2
A 4
2
A 7
GND
2
A 8
2
CLKAB
2
A 6
1
OEAB
1
C EAB
2
OEAB
2
C EAB
2
CE BA
1
CE BA
47
37
38
39
40
41
42
43
44
45
46
33
34
35
36
56
55
49
50
51
52
53
54
48
1
2
3
4
5
6
7
8
9
10
12
13
14
15
16
17
18
19
20
11
21
22
23
24
29
30
31
32
25
26
27
28
FUNCTION TABLE(1,3)
Inputs
Outputs
xCEAB
xCLKAB
xOEAB
xAx
xBx
HX
L
X
B(2)
XL
L
X
B(2)
L
LL
L
L
LH
H
XX
H
X
Z
NOTES:
1. A-to-B data flow is shown: B-to-A data flow is similar but uses xCEBA, xCLKBA, and
xOEBA.
2. Level of B before the indicated steady-state input conditions were established.
3. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don't Care
↑ = LOW-to-HIGH Transition
Z = High-impedance
PIN DESCRIPTION
Pin Names
Description
xOEAB
A-to-B Output Enable Input (Active LOW)
xOEBA
B-to-A Output Enable Input (Active LOW)
xCEAB
A-to-B Clock Enable Input (Active LOW)
xCEBA
B-to-A Clock Enable Input (Active LOW)
xCLKAB
A-to-B Clock Input
xCLKBA
B-to-A Clock Input
xAx
A-to-BDataInputsorB-to-A3-StateOutputs
xBx
B-to-ADataInputsorA-to-B3-StateOutputs


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