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SN74SSTV16859 Datasheet(PDF) 2 Page - Texas Instruments

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Part No. SN74SSTV16859
Description  13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL 2 INPUTS AND OUTPUTS
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Maker  TI [Texas Instruments]
Homepage  http://www.ti.com
Logo TI - Texas Instruments

SN74SSTV16859 Datasheet(HTML) 2 Page - Texas Instruments

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SN74SSTV16859
13BIT TO 26BIT REGISTERED BUFFER
WITH SSTL_2 INPUTS AND OUTPUTS
SCES297D − FEBRUARY 2000 − REVISED AUGUST 2004
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description/ordering information (continued)
The device supports low-power standby operation. When RESET is low, the differential input receivers are
disabled, and undriven (floating) data, clock, and reference voltage (VREF) inputs are allowed. In addition, when
RESET is low, all registers are reset, and all outputs are forced low. The LVCMOS RESET input always must
be held at a valid logic high or low level.
To ensure defined outputs from the register before a stable clock has been supplied, RESET must be held in
the low state during power up.
RGQ PACKAGE
(TOP VIEW)
Q7A
Q6A
Q5A
Q4A
Q3A
Q2A
Q1A
Q13B
VDDQ
Q12B
Q11B
Q10B
Q9B
Q8B
D10
D9
D8
D7
RESET
GND
CLK
CLK
VDDQ
VCC
VREF
D6
D5
D4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
42
41
40
39
38
37
36
35
34
33
32
31
30
29
GND†
† The center die pad must be connected to GND.
FUNCTION TABLE
INPUTS
OUTPUT
RESET
CLK
CLK
D
OUTPUT
Q
H
H
H
H
↑↓
LL
H
L or H
L or H
X
Q0
L
X or
floating
X or
floating
X or
floating
L


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